| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsAnalyzeImmediate.cpp | 46 unsigned Shamt = llvm::countr_zero(Imm); in GetInstSeqLsSLL() local
47 GetInstSeqLs(Imm >> Shamt, RemSize - Shamt, SeqLs); in GetInstSeqLsSLL()
48 AddInstr(SeqLs, Inst(SLL, Shamt)); in GetInstSeqLsSLL()
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| H A D | MipsISelLowering.cpp | 967 unsigned Shamt = CN->getZExtValue(); in performORCombine() local
972 if ((Shamt != SMPos0) || (SMPos0 + SMSize0 > ValTy.getSizeInBits())) in performORCombine()
2760 SDValue Shamt = Op.getOperand(2); in lowerShiftLeftParts() local
2768 DAG.getNode(ISD::XOR, DL, MVT::i32, Shamt, in lowerShiftLeftParts()
2773 SDValue ShiftLeftHi = DAG.getNode(ISD::SHL, DL, VT, Hi, Shamt); in lowerShiftLeftParts()
2775 SDValue ShiftLeftLo = DAG.getNode(ISD::SHL, DL, VT, Lo, Shamt); in lowerShiftLeftParts()
2776 SDValue Cond = DAG.getNode(ISD::AND, DL, MVT::i32, Shamt, in lowerShiftLeftParts()
2790 SDValue Shamt = Op.getOperand(2); in lowerShiftRightParts() local
2807 DAG.getNode(ISD::XOR, DL, MVT::i32, Shamt, in lowerShiftRightParts()
2812 SDValue ShiftRightLo = DAG.getNode(ISD::SRL, DL, VT, Lo, Shamt); in lowerShiftRightParts()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/ |
| H A D | XtensaISelLowering.cpp | 1347 SDValue Shamt = Op.getOperand(2); in LowerShiftLeftParts() local
1358 DAG.getNode(ISD::ADD, DL, VT, Shamt, MinusRegisterSize); in LowerShiftLeftParts()
1360 SDValue LoTrue = DAG.getNode(ISD::SHL, DL, VT, Lo, Shamt); in LowerShiftLeftParts()
1361 SDValue HiTrue = DAG.getNode(XtensaISD::SRCL, DL, VT, Hi, Lo, Shamt); in LowerShiftLeftParts()
1377 SDValue Shamt = Op.getOperand(2); in LowerShiftRightParts() local
1400 DAG.getNode(ISD::ADD, DL, VT, Shamt, MinusRegisterSize); in LowerShiftRightParts()
1402 SDValue LoTrue = DAG.getNode(XtensaISD::SRCR, DL, VT, Hi, Lo, Shamt); in LowerShiftRightParts()
1403 SDValue HiTrue = DAG.getNode(ShiftRightOp, DL, VT, Hi, Shamt); in LowerShiftRightParts()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 3435 SDValue Shamt = Op.getOperand(2); in LowerShiftLeftParts() local
3450 DAG.getNode(ISD::ADD, DL, VT, Shamt, MinusRegisterSize); in LowerShiftLeftParts()
3452 DAG.getNode(ISD::XOR, DL, VT, RegisterSizeMinus1, Shamt); in LowerShiftLeftParts()
3454 SDValue LoTrue = DAG.getNode(ISD::SHL, DL, VT, Lo, Shamt); in LowerShiftLeftParts()
3458 SDValue ShiftLeftHi = DAG.getNode(ISD::SHL, DL, VT, Hi, Shamt); in LowerShiftLeftParts()
3476 SDValue Shamt = Op.getOperand(2); in LowerShiftRightParts() local
3502 DAG.getNode(ISD::ADD, DL, VT, Shamt, MinusRegisterSize); in LowerShiftRightParts()
3504 DAG.getNode(ISD::XOR, DL, VT, RegisterSizeMinus1, Shamt); in LowerShiftRightParts()
3506 SDValue ShiftRightLo = DAG.getNode(ISD::SRL, DL, VT, Lo, Shamt); in LowerShiftRightParts()
3511 SDValue HiTrue = DAG.getNode(ShiftRightOp, DL, VT, Hi, Shamt); in LowerShiftRightParts()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 3692 SDValue Shamt = Op.getOperand(2); in lowerShiftLeftParts() local
3707 SDValue ShamtMinusGRLen = DAG.getNode(ISD::ADD, DL, VT, Shamt, MinusGRLen); in lowerShiftLeftParts()
3708 SDValue GRLenMinus1Shamt = DAG.getNode(ISD::XOR, DL, VT, Shamt, GRLenMinus1); in lowerShiftLeftParts()
3710 SDValue LoTrue = DAG.getNode(ISD::SHL, DL, VT, Lo, Shamt); in lowerShiftLeftParts()
3714 SDValue ShiftLeftHi = DAG.getNode(ISD::SHL, DL, VT, Hi, Shamt); in lowerShiftLeftParts()
3733 SDValue Shamt = Op.getOperand(2); in lowerShiftRightParts() local
3759 SDValue ShamtMinusGRLen = DAG.getNode(ISD::ADD, DL, VT, Shamt, MinusGRLen); in lowerShiftRightParts()
3760 SDValue GRLenMinus1Shamt = DAG.getNode(ISD::XOR, DL, VT, Shamt, GRLenMinus1); in lowerShiftRightParts()
3762 SDValue ShiftRightLo = DAG.getNode(ISD::SRL, DL, VT, Lo, Shamt); in lowerShiftRightParts()
3767 SDValue HiTrue = DAG.getNode(ShiftRightOp, DL, VT, Hi, Shamt); in lowerShiftRightParts()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 9422 SDValue Shamt = Op.getOperand(2); in lowerShiftLeftParts() local
9436 SDValue ShamtMinusXLen = DAG.getNode(ISD::ADD, DL, VT, Shamt, MinusXLen); in lowerShiftLeftParts()
9437 SDValue XLenMinus1Shamt = DAG.getNode(ISD::SUB, DL, VT, XLenMinus1, Shamt); in lowerShiftLeftParts()
9439 SDValue LoTrue = DAG.getNode(ISD::SHL, DL, VT, Lo, Shamt); in lowerShiftLeftParts()
9443 SDValue ShiftLeftHi = DAG.getNode(ISD::SHL, DL, VT, Hi, Shamt); in lowerShiftLeftParts()
9461 SDValue Shamt = Op.getOperand(2); in lowerShiftRightParts() local
9486 SDValue ShamtMinusXLen = DAG.getNode(ISD::ADD, DL, VT, Shamt, MinusXLen); in lowerShiftRightParts()
9487 SDValue XLenMinus1Shamt = DAG.getNode(ISD::SUB, DL, VT, XLenMinus1, Shamt); in lowerShiftRightParts()
9489 SDValue ShiftRightLo = DAG.getNode(ISD::SRL, DL, VT, Lo, Shamt); in lowerShiftRightParts()
9494 SDValue HiTrue = DAG.getNode(ShiftRightOp, DL, VT, Hi, Shamt); in lowerShiftRightParts()
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