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Searched refs:ShAmt (Results 1 – 25 of 56) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelDAGToDAG.h89 bool selectShiftMask(SDValue N, unsigned ShiftWidth, SDValue &ShAmt);
90 bool selectShiftMaskXLen(SDValue N, SDValue &ShAmt) { in selectShiftMaskXLen() argument
91 return selectShiftMask(N, Subtarget->getXLen(), ShAmt); in selectShiftMaskXLen()
93 bool selectShiftMask32(SDValue N, SDValue &ShAmt) { in selectShiftMask32() argument
94 return selectShiftMask(N, 32, ShAmt); in selectShiftMask32()
114 bool selectSHXADDOp(SDValue N, unsigned ShAmt, SDValue &Val);
115 template <unsigned ShAmt> bool selectSHXADDOp(SDValue N, SDValue &Val) { in selectSHXADDOp()
116 return selectSHXADDOp(N, ShAmt, Val); in selectSHXADDOp()
119 bool selectSHXADD_UWOp(SDValue N, unsigned ShAmt, SDValue &Val);
120 template <unsigned ShAmt> bool selectSHXADD_UWOp(SDValue N, SDValue &Val) { in selectSHXADD_UWOp()
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H A DRISCVISelDAGToDAG.cpp559 uint64_t ShAmt = ShlCst->getZExtValue(); in tryShrinkShlLogicImm() local
563 uint64_t RemovedBitsMask = maskTrailingOnes<uint64_t>(ShAmt); in tryShrinkShlLogicImm()
567 int64_t ShiftedVal = Val >> ShAmt; in tryShrinkShlLogicImm()
572 if (SignExt && ShAmt >= 32) in tryShrinkShlLogicImm()
591 CurDAG->getTargetConstant(ShAmt, DL, VT)); in tryShrinkShlLogicImm()
1183 unsigned ShAmt = N1C->getZExtValue(); in Select() local
1190 if (ShAmt <= 32 && TrailingZeros > 0 && LeadingZeros == 32) { in Select()
1198 CurDAG->getTargetConstant(TrailingZeros + ShAmt, DL, VT)); in Select()
1202 if (TrailingZeros == 0 && LeadingZeros > ShAmt && in Select()
1217 CurDAG->getTargetConstant(LeadingZeros - ShAmt, DL, VT)); in Select()
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H A DRISCVOptWInstrs.cpp214 unsigned ShAmt = UserMI->getOperand(2).getImm(); in hasAllNBitUsers() local
215 if (Bits > ShAmt) { in hasAllNBitUsers()
216 Worklist.emplace_back(UserMI, Bits - ShAmt); in hasAllNBitUsers()
225 unsigned ShAmt = UserMI->getOperand(2).getImm(); in hasAllNBitUsers() local
226 if (Bits >= (ST.getXLen() - ShAmt)) in hasAllNBitUsers()
228 Worklist.emplace_back(UserMI, Bits + ShAmt); in hasAllNBitUsers()
232 unsigned ShAmt = UserMI->getOperand(2).getImm(); in hasAllNBitUsers() local
233 if (Bits >= 32 - ShAmt) in hasAllNBitUsers()
235 Worklist.emplace_back(UserMI, Bits + ShAmt); in hasAllNBitUsers()
H A DRISCVMergeBaseOffset.cpp301 unsigned ShAmt; in foldShiftedOffset() local
304 case RISCV::SH1ADD: ShAmt = 1; break; in foldShiftedOffset()
305 case RISCV::SH2ADD: ShAmt = 2; break; in foldShiftedOffset()
306 case RISCV::SH3ADD: ShAmt = 3; break; in foldShiftedOffset()
309 Offset = (uint64_t)Offset << ShAmt; in foldShiftedOffset()
H A DRISCVFoldMemOffset.cpp159 unsigned ShAmt = User.getOperand(2).getImm(); in foldOffset() local
162 Offset = (uint64_t)I->second << ShAmt; in foldOffset()
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelDAGToDAG.h49 bool selectShiftMask(SDValue N, unsigned ShiftWidth, SDValue &ShAmt);
50 bool selectShiftMaskGRLen(SDValue N, SDValue &ShAmt) { in selectShiftMaskGRLen() argument
51 return selectShiftMask(N, Subtarget->getGRLen(), ShAmt); in selectShiftMaskGRLen()
53 bool selectShiftMask32(SDValue N, SDValue &ShAmt) { in selectShiftMask32() argument
54 return selectShiftMask(N, 32, ShAmt); in selectShiftMask32()
H A DLoongArchISelDAGToDAG.cpp272 SDValue &ShAmt) { in selectShiftMask() argument
285 ShAmt = N.getOperand(0); in selectShiftMask()
293 ShAmt = N.getOperand(0); in selectShiftMask()
304 ShAmt = N.getOperand(0); in selectShiftMask()
320 ShAmt = SDValue(Neg, 0); in selectShiftMask()
325 ShAmt = N; in selectShiftMask()
H A DLoongArchOptWInstrs.cpp220 unsigned ShAmt = UserMI->getOperand(2).getImm(); in hasAllNBitUsers() local
221 if (Bits > ShAmt) { in hasAllNBitUsers()
222 Worklist.push_back(std::make_pair(UserMI, Bits - ShAmt)); in hasAllNBitUsers()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/
H A DRISCVInstructionSelector.cpp118 ComplexRendererFns selectSHXADDOp(MachineOperand &Root, unsigned ShAmt) const;
119 template <unsigned ShAmt>
121 return selectSHXADDOp(Root, ShAmt); in selectSHXADDOp()
125 unsigned ShAmt) const;
126 template <unsigned ShAmt>
128 return selectSHXADD_UWOp(Root, ShAmt); in selectSHXADD_UWOp()
257 unsigned ShAmt = UserMI.getOperand(2).getImm(); in hasAllNBitUsers() local
261 if (Bits > ShAmt && hasAllNBitUsers(UserMI, Bits - ShAmt, Depth + 1)) in hasAllNBitUsers()
396 unsigned ShAmt) const { in selectSHXADDOp()
427 if (*LeftShift && Leading == 0 && C2.ult(Trailing) && Trailing == ShAmt) { in selectSHXADDOp()
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineCasts.cpp585 Value *ShAmt = matchShiftAmount(ShAmt0, ShAmt1, NarrowWidth); in narrowFunnelShift() local
587 if (!ShAmt) { in narrowFunnelShift()
588 ShAmt = matchShiftAmount(ShAmt1, ShAmt0, NarrowWidth); in narrowFunnelShift()
591 if (!ShAmt) in narrowFunnelShift()
606 Value *NarrowShAmt = Builder.CreateZExtOrTrunc(ShAmt, DestTy); in narrowFunnelShift()
681 if (Constant *ShAmt = ConstantFoldIntegerCast(C, A->getType(), in narrowBinOp() local
683 ShAmt = Constant::mergeUndefsWith(ShAmt, C); in narrowBinOp()
686 ? Builder.CreateAShr(A, ShAmt, OldShift->getName(), IsExact) in narrowBinOp()
687 : Builder.CreateLShr(A, ShAmt, OldShift->getName(), IsExact); in narrowBinOp()
872 Constant *ShAmt = ConstantFoldSelectInstruction(Cmp, C, MaxAmt); in visitTrunc() local
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H A DInstCombineShifts.cpp654 auto NewInnerShift = [&](unsigned ShAmt) { in foldShiftedShift() argument
655 InnerShift->setOperand(1, ConstantInt::get(ShType, ShAmt)); in foldShiftedShift()
939 const unsigned ShAmt = ShAmtAPInt->getZExtValue(); in foldLShrOverflowBit() local
940 if (ShAmt == 1) in foldLShrOverflowBit()
944 if (X->getType()->getScalarSizeInBits() != ShAmt || in foldLShrOverflowBit()
945 Y->getType()->getScalarSizeInBits() != ShAmt) in foldLShrOverflowBit()
955 if (!Trunc || Trunc->getType()->getScalarSizeInBits() > ShAmt) in foldLShrOverflowBit()
1726 unsigned ShAmt = ShAmtAPInt->getZExtValue(); in visitAShr() local
1733 ShAmt == BitWidth - X->getType()->getScalarSizeInBits()) in visitAShr()
1742 if (ShlAmt < ShAmt) { in visitAShr()
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H A DInstCombineNegator.cpp260 Constant *ShAmt; in visitImpl() local
263 m_LShr(m_Value(X), m_ImmConstant(ShAmt)))), in visitImpl()
267 Value *R = Builder.CreateShl(X, Builder.CreateSub(BWMinusOne, ShAmt)); in visitImpl()
H A DInstCombineAddSub.cpp963 unsigned ShAmt = 0; in foldAddWithConstant() local
965 ShAmt = BitWidth - C->logBase2() - 1; in foldAddWithConstant()
967 ShAmt = BitWidth - C2->logBase2() - 1; in foldAddWithConstant()
968 if (ShAmt && in foldAddWithConstant()
969 MaskedValueIsZero(X, APInt::getHighBitsSet(BitWidth, ShAmt), &Add)) { in foldAddWithConstant()
970 Constant *ShAmtC = ConstantInt::get(Ty, ShAmt); in foldAddWithConstant()
1457 Value *X, *Y, *ShAmt; in factorizeMathWithShlOps() local
1458 if (!match(Op0, m_Shl(m_Value(X), m_Value(ShAmt))) || in factorizeMathWithShlOps()
1459 !match(Op1, m_Shl(m_Value(Y), m_Specific(ShAmt)))) in factorizeMathWithShlOps()
1474 auto *NewShl = BinaryOperator::CreateShl(NewMath, ShAmt); in factorizeMathWithShlOps()
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H A DInstCombineVectorOps.cpp291 unsigned ShAmt = Chunk * DestWidth; in foldBitcastExtElt() local
305 if (ShAmt) { in foldBitcastExtElt()
309 Scalar = Builder.CreateLShr(Scalar, ShAmt); in foldBitcastExtElt()
1656 uint64_t ShAmt; in foldTruncInsEltPair() local
1659 !match(Scalar0, m_Trunc(m_LShr(m_Specific(X), m_ConstantInt(ShAmt))))) in foldTruncInsEltPair()
1663 !match(ScalarOp, m_Trunc(m_LShr(m_Specific(X), m_ConstantInt(ShAmt))))) in foldTruncInsEltPair()
1670 if (ScalarWidth != VecEltWidth * 2 || ShAmt != VecEltWidth) in foldTruncInsEltPair()
/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaISelDAGToDAG.cpp172 unsigned ShAmt = C->getZExtValue(); in Select() local
174 Xtensa::EXTUI, DL, VT, N0, CurDAG->getTargetConstant(ShAmt, DL, VT), in Select()
175 CurDAG->getTargetConstant(32 - ShAmt, DL, VT)); in Select()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/AggressiveInstCombine/
H A DAggressiveInstCombine.cpp79 Value *&ShAmt) { in foldGuardedFunnelShift() argument
85 m_Shl(m_Value(ShVal0), m_Value(ShAmt)), in foldGuardedFunnelShift()
87 m_Sub(m_SpecificInt(Width), m_Deferred(ShAmt))))))) { in foldGuardedFunnelShift()
95 m_Value(ShAmt))), in foldGuardedFunnelShift()
96 m_LShr(m_Value(ShVal1), m_Deferred(ShAmt)))))) { in foldGuardedFunnelShift()
111 Value *ShVal0, *ShVal1, *ShAmt; in foldGuardedFunnelShift() local
112 Intrinsic::ID IID = matchFunnelShift(P0, ShVal0, ShVal1, ShAmt); in foldGuardedFunnelShift()
116 IID = matchFunnelShift(P1, ShVal0, ShVal1, ShAmt); in foldGuardedFunnelShift()
139 if (!match(TermI, m_Br(m_SpecificICmp(CmpInst::ICMP_EQ, m_Specific(ShAmt), in foldGuardedFunnelShift()
176 Builder.CreateIntrinsic(IID, Phi.getType(), {ShVal0, ShVal1, ShAmt})); in foldGuardedFunnelShift()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp839 unsigned ShAmt = *MaxSA; in SimplifyMultipleUseDemandedBits() local
843 if (NumSignBits > ShAmt && (NumSignBits - ShAmt) >= (UpperDemandedBits)) in SimplifyMultipleUseDemandedBits()
854 unsigned ShAmt = *MaxSA; in SimplifyMultipleUseDemandedBits() local
857 if (DemandedBits.countl_zero() >= ShAmt) { in SimplifyMultipleUseDemandedBits()
1786 unsigned ShAmt = *KnownSA; in SimplifyDemandedBits() local
1787 if (ShAmt == 0) in SimplifyDemandedBits()
1795 if (!DemandedBits.intersects(APInt::getLowBitsSet(BitWidth, ShAmt))) { in SimplifyDemandedBits()
1800 int Diff = ShAmt - C1; in SimplifyDemandedBits()
1819 if (ShAmt < InnerBits && DemandedBits.getActiveBits() <= InnerBits && in SimplifyDemandedBits()
1823 TLO.DAG.getShiftAmountConstant(ShAmt, InnerVT, dl)); in SimplifyDemandedBits()
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H A DDAGCombiner.cpp763 EVT &MemVT, unsigned ShAmt = 0);
2769 SDValue ShAmt = ShiftOp.getOperand(1); in foldAddSubOfSignBit() local
2770 ConstantSDNode *ShAmtC = isConstOrConstSplat(ShAmt); in foldAddSubOfSignBit()
2781 Not.getOperand(0), ShAmt); in foldAddSubOfSignBit()
4375 SDValue ShAmt = N1.getOperand(1); in visitSUB() local
4376 ConstantSDNode *ShAmtC = isConstOrConstSplat(ShAmt); in visitSUB()
4378 SDValue SRA = DAG.getNode(ISD::SRA, DL, VT, N1.getOperand(0), ShAmt); in visitSUB()
4769 unsigned ShAmt = in visitMUL() local
4771 ShAmt += TZeros; in visitMUL()
4772 assert(ShAmt < BitWidth && in visitMUL()
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H A DLegalizeIntegerTypes.cpp627 SDValue ShAmt = DAG.getShiftAmountConstant(DiffBits, NVT, dl); in PromoteIntRes_BSWAP() local
630 ShAmt); in PromoteIntRes_BSWAP()
634 DAG.getNode(ISD::VP_BSWAP, dl, NVT, Op, Mask, EVL), ShAmt, in PromoteIntRes_BSWAP()
655 SDValue ShAmt = DAG.getShiftAmountConstant(DiffBits, NVT, dl); in PromoteIntRes_BITREVERSE() local
658 DAG.getNode(ISD::BITREVERSE, dl, NVT, Op), ShAmt); in PromoteIntRes_BITREVERSE()
663 ShAmt, Mask, EVL); in PromoteIntRes_BITREVERSE()
2431 SDValue ShAmt = DAG.getShiftAmountConstant(Diff, VT, dl); in PromoteIntOp_VP_SIGN_EXTEND() local
2433 SDValue Shl = DAG.getNode(ISD::VP_SHL, dl, VT, Op, ShAmt, N->getOperand(1), in PromoteIntOp_VP_SIGN_EXTEND()
2435 return DAG.getNode(ISD::VP_SRA, dl, VT, Shl, ShAmt, N->getOperand(1), in PromoteIntOp_VP_SIGN_EXTEND()
4809 SDValue ShAmt = N->getOperand(1); in ExpandIntRes_ShiftThroughStack() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp1198 SDValue ShAmt = Op.getOperand(2); in LowerSHL_PARTS() local
1208 DAG.getConstant(VTBits, dl, MVT::i32), ShAmt); in LowerSHL_PARTS()
1214 SDValue SetCC = DAG.getSetCC(dl, MVT::i32, ShAmt, Zero, ISD::SETEQ); in LowerSHL_PARTS()
1217 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, ShAmt, in LowerSHL_PARTS()
1219 SDValue HiBitsForHi = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, ShAmt); in LowerSHL_PARTS()
1231 SDValue LoForNormalShift = DAG.getNode(ISD::SHL, dl, VT, ShOpLo, ShAmt); in LowerSHL_PARTS()
1246 SDValue ShAmt = Op.getOperand(2); in LowerSRL_PARTS() local
1261 ISD::SUB, dl, MVT::i32, DAG.getConstant(VTBits, dl, MVT::i32), ShAmt); in LowerSRL_PARTS()
1264 SDValue Hi = DAG.getNode(ISD::SRL, dl, MVT::i32, ShOpHi, ShAmt); in LowerSRL_PARTS()
1267 SDValue Lo = DAG.getNode(ISD::SRL, dl, MVT::i32, ShOpLo, ShAmt); in LowerSRL_PARTS()
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/freebsd/contrib/llvm-project/llvm/lib/Support/
H A DAPInt.cpp1988 APInt APInt::sshl_ov(const APInt &ShAmt, bool &Overflow) const { in sshl_ov() argument
1989 return sshl_ov(ShAmt.getLimitedValue(getBitWidth()), Overflow); in sshl_ov()
1992 APInt APInt::sshl_ov(unsigned ShAmt, bool &Overflow) const { in sshl_ov() argument
1993 Overflow = ShAmt >= getBitWidth(); in sshl_ov()
1998 Overflow = ShAmt >= countl_zero(); in sshl_ov()
2000 Overflow = ShAmt >= countl_one(); in sshl_ov()
2002 return *this << ShAmt; in sshl_ov()
2005 APInt APInt::ushl_ov(const APInt &ShAmt, bool &Overflow) const { in ushl_ov() argument
2006 return ushl_ov(ShAmt.getLimitedValue(getBitWidth()), Overflow); in ushl_ov()
2009 APInt APInt::ushl_ov(unsigned ShAmt, bool &Overflow) const { in ushl_ov() argument
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/freebsd/contrib/llvm-project/clang/lib/Lex/
H A DPPExpressions.cpp753 unsigned ShAmt = static_cast<unsigned>(RHS.Val.getLimitedValue()); in EvaluateDirectiveSubExpr() local
754 if (ShAmt >= LHS.getBitWidth()) { in EvaluateDirectiveSubExpr()
756 ShAmt = LHS.getBitWidth()-1; in EvaluateDirectiveSubExpr()
758 Res = LHS.Val >> ShAmt; in EvaluateDirectiveSubExpr()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp88 ARM_AM::ShiftOpc ShOpcVal, unsigned ShAmt);
542 unsigned ShAmt) { in isShifterOpProfitable() argument
549 (ShAmt == 2 || (Subtarget->isSwift() && ShAmt == 1)); in isShifterOpProfitable()
734 unsigned ShAmt = Log2_32(RHSC); in SelectLdStSOReg() local
736 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, ShAmt, in SelectLdStSOReg()
762 unsigned ShAmt = 0; in SelectLdStSOReg() local
772 ShAmt = Sh->getZExtValue(); in SelectLdStSOReg()
773 if (isShifterOpProfitable(Offset, ShOpcVal, ShAmt)) in SelectLdStSOReg()
776 ShAmt = 0; in SelectLdStSOReg()
794 ShAmt = Sh->getZExtValue(); in SelectLdStSOReg()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPULateCodeGenPrepare.cpp507 unsigned ShAmt = Adjust * 8; in visitLoadInst() local
509 IRB.CreateTrunc(IRB.CreateLShr(NewLd, ShAmt), in visitLoadInst()
/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp2264 SDValue ShAmt = Op.getOperand(2); in LowerShiftRightParts() local
2273 SDValue Hi = DAG.getNode(Opc, dl, VT, ShOpHi, ShAmt); in LowerShiftRightParts()
2275 DAG.getNode(NVPTXISD::FSHR_CLAMP, dl, VT, ShOpHi, ShOpLo, ShAmt); in LowerShiftRightParts()
2291 ShAmt); in LowerShiftRightParts()
2292 SDValue Tmp1 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, ShAmt); in LowerShiftRightParts()
2293 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, ShAmt, in LowerShiftRightParts()
2299 SDValue Cmp = DAG.getSetCC(dl, MVT::i1, ShAmt, in LowerShiftRightParts()
2302 SDValue Hi = DAG.getNode(Opc, dl, VT, ShOpHi, ShAmt); in LowerShiftRightParts()
2325 SDValue ShAmt = Op.getOperand(2); in LowerShiftLeftParts() local
2334 DAG.getNode(NVPTXISD::FSHL_CLAMP, dl, VT, ShOpHi, ShOpLo, ShAmt); in LowerShiftLeftParts()
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