/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelDAGToDAG.h | 87 bool selectShiftMask(SDValue N, unsigned ShiftWidth, SDValue &ShAmt); 88 bool selectShiftMaskXLen(SDValue N, SDValue &ShAmt) { in selectShiftMaskXLen() argument 89 return selectShiftMask(N, Subtarget->getXLen(), ShAmt); in selectShiftMaskXLen() 91 bool selectShiftMask32(SDValue N, SDValue &ShAmt) { in selectShiftMask32() argument 92 return selectShiftMask(N, 32, ShAmt); in selectShiftMask32() 112 bool selectSHXADDOp(SDValue N, unsigned ShAmt, SDValue &Val); 113 template <unsigned ShAmt> bool selectSHXADDOp(SDValue N, SDValue &Val) { in selectSHXADDOp() 114 return selectSHXADDOp(N, ShAmt, Val); in selectSHXADDOp() 117 bool selectSHXADD_UWOp(SDValue N, unsigned ShAmt, SDValue &Val); 118 template <unsigned ShAmt> bool selectSHXADD_UWOp(SDValue N, SDValue &Val) { in selectSHXADD_UWOp() [all …]
|
H A D | RISCVISelDAGToDAG.cpp | 645 uint64_t ShAmt = ShlCst->getZExtValue(); in tryShrinkShlLogicImm() local 649 uint64_t RemovedBitsMask = maskTrailingOnes<uint64_t>(ShAmt); in tryShrinkShlLogicImm() 653 int64_t ShiftedVal = Val >> ShAmt; in tryShrinkShlLogicImm() 658 if (SignExt && ShAmt >= 32) in tryShrinkShlLogicImm() 677 CurDAG->getTargetConstant(ShAmt, DL, VT)); in tryShrinkShlLogicImm() 1080 unsigned ShAmt = N1C->getZExtValue(); in Select() local 1085 if (ShAmt <= 32 && isShiftedMask_64(Mask)) { in Select() 1095 CurDAG->getTargetConstant(TrailingZeros + ShAmt, DL, VT)); in Select() 1109 unsigned ShAmt = N1C->getZExtValue(); in Select() local 1118 if (LeadingZeros == 32 && TrailingZeros > ShAmt) { in Select() [all …]
|
H A D | RISCVMergeBaseOffset.cpp | 286 unsigned ShAmt; in foldShiftedOffset() local 289 case RISCV::SH1ADD: ShAmt = 1; break; in foldShiftedOffset() 290 case RISCV::SH2ADD: ShAmt = 2; break; in foldShiftedOffset() 291 case RISCV::SH3ADD: ShAmt = 3; break; in foldShiftedOffset() 294 Offset = (uint64_t)Offset << ShAmt; in foldShiftedOffset()
|
H A D | RISCVOptWInstrs.cpp | 208 unsigned ShAmt = UserMI->getOperand(2).getImm(); in hasAllNBitUsers() local 209 if (Bits > ShAmt) { in hasAllNBitUsers() 210 Worklist.push_back(std::make_pair(UserMI, Bits - ShAmt)); in hasAllNBitUsers()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
H A D | LoongArchISelDAGToDAG.h | 47 bool selectShiftMask(SDValue N, unsigned ShiftWidth, SDValue &ShAmt); 48 bool selectShiftMaskGRLen(SDValue N, SDValue &ShAmt) { in selectShiftMaskGRLen() argument 49 return selectShiftMask(N, Subtarget->getGRLen(), ShAmt); in selectShiftMaskGRLen() 51 bool selectShiftMask32(SDValue N, SDValue &ShAmt) { in selectShiftMask32() argument 52 return selectShiftMask(N, 32, ShAmt); in selectShiftMask32()
|
H A D | LoongArchISelDAGToDAG.cpp | 233 SDValue &ShAmt) { in selectShiftMask() argument 246 ShAmt = N.getOperand(0); in selectShiftMask() 254 ShAmt = N.getOperand(0); in selectShiftMask() 265 ShAmt = N.getOperand(0); in selectShiftMask() 281 ShAmt = SDValue(Neg, 0); in selectShiftMask() 286 ShAmt = N; in selectShiftMask()
|
H A D | LoongArchOptWInstrs.cpp | 190 unsigned ShAmt = UserMI->getOperand(2).getImm(); in hasAllNBitUsers() local 191 if (Bits > ShAmt) { in hasAllNBitUsers() 192 Worklist.push_back(std::make_pair(UserMI, Bits - ShAmt)); in hasAllNBitUsers()
|
/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineCasts.cpp | 510 Value *ShAmt = matchShiftAmount(ShAmt0, ShAmt1, NarrowWidth); in narrowFunnelShift() local 512 if (!ShAmt) { in narrowFunnelShift() 513 ShAmt = matchShiftAmount(ShAmt1, ShAmt0, NarrowWidth); in narrowFunnelShift() 516 if (!ShAmt) in narrowFunnelShift() 531 Value *NarrowShAmt = Builder.CreateZExtOrTrunc(ShAmt, DestTy); in narrowFunnelShift() 605 if (Constant *ShAmt = ConstantFoldIntegerCast(C, A->getType(), in narrowBinOp() local 607 ShAmt = Constant::mergeUndefsWith(ShAmt, C); in narrowBinOp() 610 ? Builder.CreateAShr(A, ShAmt, OldShift->getName(), IsExact) in narrowBinOp() 611 : Builder.CreateLShr(A, ShAmt, OldShift->getName(), IsExact); in narrowBinOp() 799 Constant *ShAmt = ConstantFoldSelectInstruction(Cmp, C, MaxAmt); in visitTrunc() local [all …]
|
H A D | InstCombineShifts.cpp | 638 auto NewInnerShift = [&](unsigned ShAmt) { in foldShiftedShift() argument 639 InnerShift->setOperand(1, ConstantInt::get(ShType, ShAmt)); in foldShiftedShift() 923 const unsigned ShAmt = ShAmtAPInt->getZExtValue(); in foldLShrOverflowBit() local 924 if (ShAmt == 1) in foldLShrOverflowBit() 928 if (X->getType()->getScalarSizeInBits() != ShAmt || in foldLShrOverflowBit() 929 Y->getType()->getScalarSizeInBits() != ShAmt) in foldLShrOverflowBit() 939 if (!Trunc || Trunc->getType()->getScalarSizeInBits() > ShAmt) in foldLShrOverflowBit() 1683 unsigned ShAmt = ShAmtAPInt->getZExtValue(); in visitAShr() local 1690 ShAmt == BitWidth - X->getType()->getScalarSizeInBits()) in visitAShr() 1699 if (ShlAmt < ShAmt) { in visitAShr() [all …]
|
H A D | InstCombineNegator.cpp | 264 Constant *ShAmt; in visitImpl() local 267 m_LShr(m_Value(X), m_ImmConstant(ShAmt)))), in visitImpl() 271 Value *R = Builder.CreateShl(X, Builder.CreateSub(BWMinusOne, ShAmt)); in visitImpl()
|
H A D | InstCombineAddSub.cpp | 963 unsigned ShAmt = 0; in foldAddWithConstant() local 965 ShAmt = BitWidth - C->logBase2() - 1; in foldAddWithConstant() 967 ShAmt = BitWidth - C2->logBase2() - 1; in foldAddWithConstant() 968 if (ShAmt && MaskedValueIsZero(X, APInt::getHighBitsSet(BitWidth, ShAmt), in foldAddWithConstant() 970 Constant *ShAmtC = ConstantInt::get(Ty, ShAmt); in foldAddWithConstant() 1422 Value *X, *Y, *ShAmt; in factorizeMathWithShlOps() local 1423 if (!match(Op0, m_Shl(m_Value(X), m_Value(ShAmt))) || in factorizeMathWithShlOps() 1424 !match(Op1, m_Shl(m_Value(Y), m_Specific(ShAmt)))) in factorizeMathWithShlOps() 1439 auto *NewShl = BinaryOperator::CreateShl(NewMath, ShAmt); in factorizeMathWithShlOps() 2564 const APInt *ShAmt; in visitSub() local [all …]
|
H A D | InstCombineVectorOps.cpp | 291 unsigned ShAmt = Chunk * DestWidth; in foldBitcastExtElt() local 305 if (ShAmt) { in foldBitcastExtElt() 309 Scalar = Builder.CreateLShr(Scalar, ShAmt); in foldBitcastExtElt() 1578 uint64_t ShAmt; in foldTruncInsEltPair() local 1581 !match(Scalar0, m_Trunc(m_LShr(m_Specific(X), m_ConstantInt(ShAmt))))) in foldTruncInsEltPair() 1585 !match(ScalarOp, m_Trunc(m_LShr(m_Specific(X), m_ConstantInt(ShAmt))))) in foldTruncInsEltPair() 1592 if (ScalarWidth != VecEltWidth * 2 || ShAmt != VecEltWidth) in foldTruncInsEltPair()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
H A D | RISCVInstructionSelector.cpp | 90 ComplexRendererFns selectSHXADDOp(MachineOperand &Root, unsigned ShAmt) const; 91 template <unsigned ShAmt> 93 return selectSHXADDOp(Root, ShAmt); in selectSHXADDOp() 97 unsigned ShAmt) const; 98 template <unsigned ShAmt> 100 return selectSHXADD_UWOp(Root, ShAmt); in selectSHXADD_UWOp() 244 unsigned ShAmt) const { in selectSHXADDOp() 277 if (*LeftShift && Leading == 0 && C2.ult(Trailing) && Trailing == ShAmt) { in selectSHXADDOp() 289 if (!*LeftShift && Leading == C2 && Trailing == ShAmt) { in selectSHXADDOp() 321 (Trailing + C2.getLimitedValue()) == ShAmt; in selectSHXADDOp() [all …]
|
/freebsd/contrib/llvm-project/llvm/lib/Transforms/AggressiveInstCombine/ |
H A D | AggressiveInstCombine.cpp | 79 Value *&ShAmt) { in foldGuardedFunnelShift() argument 82 // fshl(ShVal0, ShVal1, ShAmt) in foldGuardedFunnelShift() 83 // == (ShVal0 << ShAmt) | (ShVal1 >> (Width -ShAmt)) in foldGuardedFunnelShift() 85 m_Shl(m_Value(ShVal0), m_Value(ShAmt)), in foldGuardedFunnelShift() 87 m_Sub(m_SpecificInt(Width), m_Deferred(ShAmt))))))) { in foldGuardedFunnelShift() 91 // fshr(ShVal0, ShVal1, ShAmt) in foldGuardedFunnelShift() 92 // == (ShVal0 >> ShAmt) | (ShVal1 << (Width - ShAmt)) in foldGuardedFunnelShift() 95 m_Value(ShAmt))), in foldGuardedFunnelShift() 111 Value *ShVal0, *ShVal1, *ShAmt; foldGuardedFunnelShift() local [all...] |
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 802 unsigned ShAmt = *MaxSA; in SimplifyMultipleUseDemandedBits() local 806 if (NumSignBits > ShAmt && (NumSignBits - ShAmt) >= (UpperDemandedBits)) in SimplifyMultipleUseDemandedBits() 1739 unsigned ShAmt = *KnownSA; in SimplifyDemandedBits() local 1740 if (ShAmt == 0) in SimplifyDemandedBits() 1748 if (!DemandedBits.intersects(APInt::getLowBitsSet(BitWidth, ShAmt))) { in SimplifyDemandedBits() 1753 int Diff = ShAmt - C1; in SimplifyDemandedBits() 1772 if (ShAmt < InnerBits && DemandedBits.getActiveBits() <= InnerBits && in SimplifyDemandedBits() 1776 TLO.DAG.getShiftAmountConstant(ShAmt, InnerVT, dl)); in SimplifyDemandedBits() 1792 if (InnerShAmt < ShAmt && InnerShAmt < InnerBits && in SimplifyDemandedBits() 1794 (InnerBits - InnerShAmt + ShAmt) && in SimplifyDemandedBits() [all …]
|
H A D | DAGCombiner.cpp | 754 EVT &MemVT, unsigned ShAmt = 0); 2607 SDValue ShAmt = ShiftOp.getOperand(1); in foldAddSubOfSignBit() local 2608 ConstantSDNode *ShAmtC = isConstOrConstSplat(ShAmt); in foldAddSubOfSignBit() 2619 Not.getOperand(0), ShAmt); in foldAddSubOfSignBit() 4071 SDValue ShAmt = N1.getOperand(1); in visitSUB() local 4072 ConstantSDNode *ShAmtC = isConstOrConstSplat(ShAmt); in visitSUB() 4074 SDValue SRA = DAG.getNode(ISD::SRA, DL, VT, N1.getOperand(0), ShAmt); in visitSUB() 4439 unsigned ShAmt = in visitMUL() local 4441 ShAmt += TZeros; in visitMUL() 4442 assert(ShAmt < BitWidth && in visitMUL() [all …]
|
H A D | LegalizeIntegerTypes.cpp | 587 SDValue ShAmt = DAG.getShiftAmountConstant(DiffBits, NVT, dl); in PromoteIntRes_BSWAP() local 590 ShAmt); in PromoteIntRes_BSWAP() 594 DAG.getNode(ISD::VP_BSWAP, dl, NVT, Op, Mask, EVL), ShAmt, in PromoteIntRes_BSWAP() 615 SDValue ShAmt = DAG.getShiftAmountConstant(DiffBits, NVT, dl); in PromoteIntRes_BITREVERSE() local 618 DAG.getNode(ISD::BITREVERSE, dl, NVT, Op), ShAmt); in PromoteIntRes_BITREVERSE() 623 ShAmt, Mask, EVL); in PromoteIntRes_BITREVERSE() 2329 SDValue ShAmt = DAG.getShiftAmountConstant(Diff, VT, dl); in PromoteIntOp_VP_SIGN_EXTEND() local 2331 SDValue Shl = DAG.getNode(ISD::VP_SHL, dl, VT, Op, ShAmt, N->getOperand(1), in PromoteIntOp_VP_SIGN_EXTEND() 2333 return DAG.getNode(ISD::VP_SRA, dl, VT, Shl, ShAmt, N->getOperand(1), in PromoteIntOp_VP_SIGN_EXTEND() 4585 SDValue ShAmt = N->getOperand(1); in ExpandIntRes_ShiftThroughStack() local [all …]
|
/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
H A D | LanaiISelLowering.cpp | 1244 SDValue ShAmt = Op.getOperand(2); in LowerSHL_PARTS() local 1254 DAG.getConstant(VTBits, dl, MVT::i32), ShAmt); in LowerSHL_PARTS() 1260 SDValue SetCC = DAG.getSetCC(dl, MVT::i32, ShAmt, Zero, ISD::SETEQ); in LowerSHL_PARTS() 1263 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, ShAmt, in LowerSHL_PARTS() 1265 SDValue HiBitsForHi = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, ShAmt); in LowerSHL_PARTS() 1277 SDValue LoForNormalShift = DAG.getNode(ISD::SHL, dl, VT, ShOpLo, ShAmt); in LowerSHL_PARTS() 1292 SDValue ShAmt = Op.getOperand(2); in LowerSRL_PARTS() local 1307 ISD::SUB, dl, MVT::i32, DAG.getConstant(VTBits, dl, MVT::i32), ShAmt); in LowerSRL_PARTS() 1310 SDValue Hi = DAG.getNode(ISD::SRL, dl, MVT::i32, ShOpHi, ShAmt); in LowerSRL_PARTS() 1313 SDValue Lo = DAG.getNode(ISD::SRL, dl, MVT::i32, ShOpLo, ShAmt); in LowerSRL_PARTS() [all …]
|
/freebsd/contrib/llvm-project/llvm/lib/Support/ |
H A D | APInt.cpp | 1958 APInt APInt::sshl_ov(const APInt &ShAmt, bool &Overflow) const { in sshl_ov() argument 1959 return sshl_ov(ShAmt.getLimitedValue(getBitWidth()), Overflow); in sshl_ov() 1962 APInt APInt::sshl_ov(unsigned ShAmt, bool &Overflow) const { in sshl_ov() argument 1963 Overflow = ShAmt >= getBitWidth(); in sshl_ov() 1968 Overflow = ShAmt >= countl_zero(); in sshl_ov() 1970 Overflow = ShAmt >= countl_one(); in sshl_ov() 1972 return *this << ShAmt; in sshl_ov() 1975 APInt APInt::ushl_ov(const APInt &ShAmt, bool &Overflow) const { in ushl_ov() argument 1976 return ushl_ov(ShAmt.getLimitedValue(getBitWidth()), Overflow); in ushl_ov() 1979 APInt APInt::ushl_ov(unsigned ShAmt, bool &Overflow) const { in ushl_ov() argument [all …]
|
/freebsd/contrib/llvm-project/clang/lib/Lex/ |
H A D | PPExpressions.cpp | 744 unsigned ShAmt = static_cast<unsigned>(RHS.Val.getLimitedValue()); in EvaluateDirectiveSubExpr() local 745 if (ShAmt >= LHS.getBitWidth()) { in EvaluateDirectiveSubExpr() 747 ShAmt = LHS.getBitWidth()-1; in EvaluateDirectiveSubExpr() 749 Res = LHS.Val >> ShAmt; in EvaluateDirectiveSubExpr()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelDAGToDAG.cpp | 90 ARM_AM::ShiftOpc ShOpcVal, unsigned ShAmt); 551 unsigned ShAmt) { in isShifterOpProfitable() argument 558 (ShAmt == 2 || (Subtarget->isSwift() && ShAmt == 1)); in isShifterOpProfitable() 743 unsigned ShAmt = Log2_32(RHSC); in SelectLdStSOReg() local 745 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, ShAmt, in SelectLdStSOReg() 771 unsigned ShAmt = 0; in SelectLdStSOReg() local 781 ShAmt = Sh->getZExtValue(); in SelectLdStSOReg() 782 if (isShifterOpProfitable(Offset, ShOpcVal, ShAmt)) in SelectLdStSOReg() 785 ShAmt = 0; in SelectLdStSOReg() 803 ShAmt = Sh->getZExtValue(); in SelectLdStSOReg() [all …]
|
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPULateCodeGenPrepare.cpp | 499 unsigned ShAmt = Adjust * 8; in visitLoadInst() local 501 IRB.CreateTrunc(IRB.CreateLShr(NewLd, ShAmt), IntNTy), LI.getType()); in visitLoadInst()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCInstrInfo.cpp | 5035 uint64_t ShAmt = Imm & (SpecialShift32 ? 0x1F : 0x3F); in transformToImmFormFedByLI() local 5041 else if (!SetCR && ShAmt == 0 && !PostRA) { in transformToImmFormFedByLI() 5050 uint64_t SH = ShAmt == 0 ? 0 : RightShift ? 32 - ShAmt : ShAmt; in transformToImmFormFedByLI() 5051 uint64_t MB = RightShift ? ShAmt : 0; in transformToImmFormFedByLI() 5052 uint64_t ME = RightShift ? 31 : 31 - ShAmt; in transformToImmFormFedByLI() 5060 uint64_t SH = ShAmt == 0 ? 0 : RightShift ? 64 - ShAmt : ShAmt; in transformToImmFormFedByLI() 5061 uint64_t ME = RightShift ? ShAmt : 63 - ShAmt; in transformToImmFormFedByLI()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelLowering.cpp | 2439 SDValue ShAmt = Op.getOperand(2); in LowerShiftRightParts() local 2448 SDValue Hi = DAG.getNode(Opc, dl, VT, ShOpHi, ShAmt); in LowerShiftRightParts() 2450 ShAmt); in LowerShiftRightParts() 2466 ShAmt); in LowerShiftRightParts() 2467 SDValue Tmp1 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, ShAmt); in LowerShiftRightParts() 2468 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, ShAmt, in LowerShiftRightParts() 2474 SDValue Cmp = DAG.getSetCC(dl, MVT::i1, ShAmt, in LowerShiftRightParts() 2477 SDValue Hi = DAG.getNode(Opc, dl, VT, ShOpHi, ShAmt); in LowerShiftRightParts() 2500 SDValue ShAmt = Op.getOperand(2); in LowerShiftLeftParts() local 2509 ShAmt); in LowerShiftLeftParts() [all …]
|
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
H A D | SROA.cpp | 2478 uint64_t ShAmt = 8 * Offset; in extractInteger() local 2480 ShAmt = 8 * (DL.getTypeStoreSize(IntTy).getFixedValue() - in extractInteger() 2482 if (ShAmt) { in extractInteger() 2483 V = IRB.CreateLShr(V, ShAmt, Name + ".shift"); in extractInteger() 2509 uint64_t ShAmt = 8 * Offset; in insertInteger() local 2511 ShAmt = 8 * (DL.getTypeStoreSize(IntTy).getFixedValue() - in insertInteger() 2513 if (ShAmt) { in insertInteger() 2514 V = IRB.CreateShl(V, ShAmt, Name + ".shift"); in insertInteger() 2518 if (ShAmt || Ty->getBitWidth() < IntTy->getBitWidth()) { in insertInteger() 2519 APInt Mask = ~Ty->getMask().zext(IntTy->getBitWidth()).shl(ShAmt); in insertInteger()
|