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Searched refs:SelIdx (Results 1 – 2 of 2) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIOptimizeExecMaskingPreRA.cpp84 SlotIndex SelIdx) { in isDefBetween() argument
86 return (!AndLRQ.isKill() && AndLRQ.valueIn() != LR.Query(SelIdx).valueOut()); in isDefBetween()
94 SlotIndex SelIdx = LIS->getInstructionIndex(Sel).getRegSlot(); in isDefBetween() local
97 return isDefBetween(LIS->getInterval(Reg), AndIdx, SelIdx); in isDefBetween()
100 if (isDefBetween(LIS->getRegUnit(Unit), AndIdx, SelIdx)) in isDefBetween()
189 SlotIndex SelIdx = LIS->getInstructionIndex(*Sel); in optimizeVcndVcmpPair() local
222 auto CCQ = CCLI.Query(SelIdx.getRegSlot()); in optimizeVcndVcmpPair()
249 bool IsDead = SelLI->Query(SelIdx.getRegSlot()).isDeadDef(); in optimizeVcndVcmpPair()
253 LIS->removeVRegDefAt(*SelLI, SelIdx.getRegSlot()); in optimizeVcndVcmpPair()
H A DR600ISelLowering.cpp2120 int SelIdx = TII->getSelIdx(Opcode, OperandIdx[i]); in PostISelFolding() local
2122 SelIdx--; in PostISelFolding()
2123 SDValue &Sel = (SelIdx > -1) ? Ops[SelIdx] : FakeOp; in PostISelFolding()
2159 int SelIdx = TII->getSelIdx(Opcode, OperandIdx[i]); in PostISelFolding() local
2162 SelIdx--; in PostISelFolding()
2165 SDValue &Sel = (SelIdx > -1) ? Ops[SelIdx] : FakeOp; in PostISelFolding()