Searched refs:ScaleVT (Results 1 – 2 of 2) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 11338 SDVTList ScaleVT = DAG.getVTList(MVT::f32, MVT::i1); in LowerFDIV32() local
11341 DAG.getNode(AMDGPUISD::DIV_SCALE, SL, ScaleVT, {RHS, RHS, LHS}, Flags); in LowerFDIV32()
11343 DAG.getNode(AMDGPUISD::DIV_SCALE, SL, ScaleVT, {LHS, RHS, LHS}, Flags); in LowerFDIV32()
11468 SDVTList ScaleVT = DAG.getVTList(MVT::f64, MVT::i1); in LowerFDIV64() local
11470 SDValue DivScale0 = DAG.getNode(AMDGPUISD::DIV_SCALE, SL, ScaleVT, Y, Y, X); in LowerFDIV64()
11482 SDValue DivScale1 = DAG.getNode(AMDGPUISD::DIV_SCALE, SL, ScaleVT, X, Y, X); in LowerFDIV64()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 27179 EVT ScaleVT = SVT.bitsLT(InnerSVT) ? VT : InnerVT; in visitVECTOR_SHUFFLE() local
27180 EVT ScaleSVT = ScaleVT.getScalarType(); in visitVECTOR_SHUFFLE()
27182 if (TLI.isTypeLegal(ScaleVT) && in visitVECTOR_SHUFFLE()
27203 bool LegalMask = TLI.isShuffleMaskLegal(NewMask, ScaleVT); in visitVECTOR_SHUFFLE()
27207 LegalMask = TLI.isShuffleMaskLegal(NewMask, ScaleVT); in visitVECTOR_SHUFFLE()
27211 SV0 = DAG.getBitcast(ScaleVT, SV0); in visitVECTOR_SHUFFLE()
27212 SV1 = DAG.getBitcast(ScaleVT, SV1); in visitVECTOR_SHUFFLE()
27214 VT, DAG.getVectorShuffle(ScaleVT, SDLoc(N), SV0, SV1, NewMask)); in visitVECTOR_SHUFFLE()
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