/freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
H A D | VVPInstrPatternsVec.td | 182 ValueType ScalarVT, ValueType DataVT, 187 (any_broadcast ScalarVT:$sx), 195 ScalarVT:$sx, 203 (any_broadcast ScalarVT:$sx), DataVT:$vy, 207 ScalarVT:$sx, $vy, $avl)>; 210 (any_broadcast ScalarVT:$sx), DataVT:$vy, 214 ScalarVT:$sx, $vy, $mask, $avl)>; 218 ValueType ScalarVT, ValueType DataVT, 224 (any_broadcast ScalarVT:$sy), 232 ScalarVT:$sy, [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelDAGToDAG.cpp | 952 MVT ScalarVT = SimpleVT.getScalarType(); in tryLoad() local 954 unsigned fromTypeWidth = std::max(8U, (unsigned)ScalarVT.getSizeInBits()); in tryLoad() 969 fromType = getLdStRegType(ScalarVT); in tryLoad() 1085 MVT ScalarVT = SimpleVT.getScalarType(); in tryLoadVector() local 1087 unsigned FromTypeWidth = std::max(8U, (unsigned)ScalarVT.getSizeInBits()); in tryLoadVector() 1095 FromType = getLdStRegType(ScalarVT); in tryLoadVector() 1730 MVT ScalarVT = SimpleVT.getScalarType(); in tryStore() local 1731 unsigned toTypeWidth = ScalarVT.getSizeInBits(); in tryStore() 1739 unsigned int toType = getLdStRegType(ScalarVT); in tryStore() 1872 MVT ScalarVT = StoreVT.getSimpleVT().getScalarType(); in tryStoreVector() local [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMInstrMVE.td | 7067 EVT ScalarVT = Ld->getMemoryVT().getScalarType(); 7068 return ScalarVT.isInteger() && Ld->getExtensionType() == ISD::EXTLOAD; 7073 EVT ScalarVT = Ld->getMemoryVT().getScalarType(); 7074 return (ScalarVT == MVT::i16 || ScalarVT == MVT::f16) && Ld->getAlign() >= 2; 7087 EVT ScalarVT = Ld->getMemoryVT().getScalarType(); 7088 return ScalarVT.isInteger() && Ld->getExtensionType() == ISD::EXTLOAD; 7093 EVT ScalarVT = Ld->getMemoryVT().getScalarType(); 7094 return (ScalarVT == MVT::i32 || ScalarVT [all...] |
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelLowering.cpp | 805 EVT ScalarVT = VT.getScalarType(); in isFPImmLegal() local 806 return (ScalarVT == MVT::f32 || ScalarVT == MVT::f64 || in isFPImmLegal() 807 (ScalarVT == MVT::f16 && Subtarget->has16BitInsts())); in isFPImmLegal() 812 EVT ScalarVT = VT.getScalarType(); in ShouldShrinkFPConstant() local 813 return (ScalarVT != MVT::f32 && ScalarVT != MVT::f64); in ShouldShrinkFPConstant() 1229 EVT ScalarVT = EVT::getIntegerVT(State.getContext(), in analyzeFormalArgumentsCompute() local 1231 MemVT = EVT::getVectorVT(State.getContext(), ScalarVT, NumElements); in analyzeFormalArgumentsCompute() 3668 MVT ScalarVT = VT.getScalarType(); in LowerSIGN_EXTEND_INREG() local 3682 Args[I] = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, ScalarVT, Args[I], VTOp); in LowerSIGN_EXTEND_INREG()
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H A D | SIISelLowering.cpp | 1011 EVT ScalarVT = VT.getScalarType(); in getRegisterTypeForCallingConv() local 1012 unsigned Size = ScalarVT.getSizeInBits(); in getRegisterTypeForCallingConv() 1017 return (ScalarVT == MVT::bf16 ? MVT::i32 : MVT::v2f16); in getRegisterTypeForCallingConv() 1024 return Size == 32 ? ScalarVT.getSimpleVT() : MVT::i32; in getRegisterTypeForCallingConv() 1041 EVT ScalarVT = VT.getScalarType(); in getNumRegistersForCallingConv() local 1042 unsigned Size = ScalarVT.getSizeInBits(); in getNumRegistersForCallingConv() 1065 EVT ScalarVT = VT.getScalarType(); in getVectorTypeBreakdownForCallingConv() local 1066 unsigned Size = ScalarVT.getSizeInBits(); in getVectorTypeBreakdownForCallingConv() 1071 if (ScalarVT == MVT::bf16) { in getVectorTypeBreakdownForCallingConv() 1083 RegisterVT = ScalarVT.getSimpleVT(); in getVectorTypeBreakdownForCallingConv() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 7209 EVT ScalarVT = MemVT.getScalarType(); in visitAND() local 7212 isConstantSplatVectorMaskForType(N1.getNode(), ScalarVT) && in visitAND() 12072 EVT ScalarVT = VecVT.getVectorElementType(); in visitVECTOR_COMPRESS() local 12082 SDValue VecI = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, ScalarVT, Vec, in visitVECTOR_COMPRESS() 12091 ? DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, ScalarVT, Passthru, in visitVECTOR_COMPRESS() 12093 : DAG.getUNDEF(ScalarVT); in visitVECTOR_COMPRESS() 22426 EVT ScalarVT = N->getValueType(0); in refineExtractVectorEltIntoMultipleNarrowExtractVectorElts() local 22427 if (VecVT.getScalarType() != ScalarVT) in refineExtractVectorEltIntoMultipleNarrowExtractVectorElts() 22431 if (!ScalarVT.isScalarInteger()) in refineExtractVectorEltIntoMultipleNarrowExtractVectorElts() 22556 EVT ScalarVT = N->getValueType(0); in visitEXTRACT_VECTOR_ELT() local [all …]
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H A D | TargetLowering.cpp | 11441 EVT ScalarVT = VecVT.getScalarType(); in expandVECTOR_COMPRESS() local 11476 LastWriteVal = DAG.getConstant(PassthruSplatVal, DL, ScalarVT); in expandVECTOR_COMPRESS() 11484 MaskVT.changeVectorElementType(ScalarVT), Popcount); in expandVECTOR_COMPRESS() 11485 Popcount = DAG.getNode(ISD::VECREDUCE_ADD, DL, ScalarVT, Popcount); in expandVECTOR_COMPRESS() 11489 ScalarVT, DL, Chain, LastElmtPtr, in expandVECTOR_COMPRESS() 11498 SDValue ValI = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, ScalarVT, Vec, Idx); in expandVECTOR_COMPRESS() 11525 DAG.getSelect(DL, ScalarVT, AllLanesSelected, ValI, LastWriteVal); in expandVECTOR_COMPRESS()
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H A D | LegalizeDAG.cpp | 3019 MVT ScalarVT = Node->getSimpleValueType(0); in PromoteReduction() local 3049 assert(ScalarVT.isFloatingPoint() && "Only FP promotion is supported"); in PromoteReduction() 3050 return DAG.getNode(ISD::FP_ROUND, DL, ScalarVT, Res, in PromoteReduction()
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H A D | SelectionDAG.cpp | 6717 EVT ScalarVT = ScalarOp.getValueType(); in FoldConstantArithmetic() local 6721 if (ScalarVT.isInteger() && ScalarVT.bitsGT(InSVT)) { in FoldConstantArithmetic()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 755 auto LegalizeNarrowFP = [this](MVT ScalarVT) { in AArch64TargetLowering() argument 795 setOperationAction(Op, ScalarVT, Promote); in AArch64TargetLowering() 798 setOperationAction(Op, ScalarVT, Legal); in AArch64TargetLowering() 805 setOperationAction(Op, ScalarVT, Custom); in AArch64TargetLowering() 808 auto V4Narrow = MVT::getVectorVT(ScalarVT, 4); in AArch64TargetLowering() 831 auto V8Narrow = MVT::getVectorVT(ScalarVT, 8); in AArch64TargetLowering() 4443 EVT ScalarVT = VT.getScalarType(); in LowerVectorFP_TO_INT() local 4445 return DAG.getNode(Op.getOpcode(), dl, {ScalarVT, MVT::Other}, in LowerVectorFP_TO_INT() 4447 return DAG.getNode(Op.getOpcode(), dl, ScalarVT, Extract); in LowerVectorFP_TO_INT() 4721 EVT ScalarVT = VT.getScalarType(); in LowerVectorINT_TO_FP() local [all …]
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H A D | AArch64InstrInfo.td | 3885 … ValueType ScalarVT, Instruction LoadInst, Instruction UnscaledLoadInst, 3890 (ScalarVT (LoadOp (Addr GPR64sp:$Rn, AddrImm:$offset))), (i64 0)), 3894 (ScalarVT (LoadOp (UnscaledAddr GPR64sp:$Rn, simm9:$offset))), (i64 0)), 3899 (ScalarVT (LoadOp (Addr GPR64sp:$Rn, AddrImm:$offset))), (i64 0)), 3903 (ScalarVT (LoadOp (UnscaledAddr GPR64sp:$Rn, simm9:$offset))), (i64 0)), 3908 (ScalarVT (LoadOp (Addr GPR64sp:$Rn, AddrImm:$offset))), (i64 0)), 3912 (ScalarVT (LoadOp (UnscaledAddr GPR64sp:$Rn, simm9:$offset))), (i64 0)),
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H A D | AArch64ISelDAGToDAG.cpp | 7131 EVT ScalarVT = in getPackedVectorTypeFromPredicateType() local 7133 EVT MemVT = EVT::getVectorVT(Ctx, ScalarVT, EC * NumVec); in getPackedVectorTypeFromPredicateType()
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/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyISelLowering.cpp | 428 EVT ScalarVT = VecVT.getScalarType(); in shouldScalarizeBinop() local 429 return isOperationLegalOrCustomOrPromote(Opc, ScalarVT); in shouldScalarizeBinop()
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 2207 EVT ScalarVT = VecVT.getScalarType(); in shouldScalarizeBinop() 2208 return isOperationLegalOrCustomOrPromote(Opc, ScalarVT) || in shouldScalarizeBinop() 2209 isOperationCustom(Opc, ScalarVT); in shouldScalarizeBinop() 9440 MVT ScalarVT = ContainerVT.getVectorElementType(); in LowerINTRINSIC_W_CHAIN() 9444 ScalarVT, Load->getMemOperand()); in LowerINTRINSIC_W_CHAIN() 9448 } else if (IsUnmasked && isNullConstant(Stride) && isTypeLegal(ScalarVT)) { in LowerINTRINSIC_W_CHAIN() 9449 SDValue ScalarLoad = DAG.getLoad(ScalarVT, DL, Load->getChain(), Ptr, in LowerINTRINSIC_W_CHAIN() 13099 EVT ScalarVT = ScalarV.getValueType(); in combineBinOpToReduce() 13133 if (ScalarVT != ScalarV.getValueType()) in combineBinOpToReduce() 13135 DAG.getNode(ISD::INSERT_SUBVECTOR, DL, ScalarVT, DA in combineBinOpToReduce() 2206 EVT ScalarVT = VecVT.getScalarType(); shouldScalarizeBinop() local 9438 MVT ScalarVT = ContainerVT.getVectorElementType(); LowerINTRINSIC_W_CHAIN() local 13096 EVT ScalarVT = ScalarV.getValueType(); combineBinOpToReduce() local [all...] |
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 3043 MVT ScalarVT = MVT::INVALID_SIMPLE_VALUE_TYPE; in getTgtMemIntrinsic() local 3045 ScalarVT = MVT::i8; in getTgtMemIntrinsic() 3047 ScalarVT = MVT::i16; in getTgtMemIntrinsic() 3049 ScalarVT = MVT::i32; in getTgtMemIntrinsic() 3051 Info.memVT = MVT::getVectorVT(ScalarVT, VT.getVectorNumElements()); in getTgtMemIntrinsic() 3224 EVT ScalarVT = VecVT.getScalarType(); in shouldScalarizeBinop() local 3225 return isOperationLegalOrCustomOrPromote(Opc, ScalarVT); in shouldScalarizeBinop() 14552 MVT ScalarVT = VT.getVectorElementType(); in splitAndLowerShuffle() local 14553 MVT SplitVT = MVT::getVectorVT(ScalarVT, SplitNumElements); in splitAndLowerShuffle() 32025 MVT ScalarVT = VT.getScalarType(); in LowerMLOAD() local [all …]
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H A D | X86InstrSSE.td | 2913 ValueType ScalarVT, X86MemOperand x86memop, 2948 (ScalarVT (IMPLICIT_DEF)), RC:$src)>; 2951 def : Pat<(ScalarVT (OpNode (load addr:$src))), 2952 (!cast<Instruction>(NAME#m) (ScalarVT (IMPLICIT_DEF)),
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