Searched refs:ScalarReg (Results 1 – 4 of 4) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64RegisterBankInfo.cpp | 784 Register ScalarReg = MI.getOperand(1).getReg(); in getInstrMapping() local
785 LLT ScalarTy = MRI.getType(ScalarReg); in getInstrMapping()
786 auto ScalarDef = MRI.getVRegDef(ScalarReg); in getInstrMapping()
792 (getRegBank(ScalarReg, MRI, TRI) == &AArch64::FPRRegBank || in getInstrMapping()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMInstrMVE.td | 856 ValueType Scalar, RegisterClass ScalarReg> {
863 def : Pat<(Scalar (unpred_intr (Scalar ScalarReg:$prev),
865 (COPY_TO_REGCLASS (Inst (COPY_TO_REGCLASS ScalarReg:$prev, rGPR),
867 ScalarReg)>;
868 def : Pat<(Scalar (pred_intr (Scalar ScalarReg:$prev),
871 (COPY_TO_REGCLASS (Inst (COPY_TO_REGCLASS ScalarReg:$prev, rGPR),
874 ScalarReg)>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfoVPseudos.td | 256 ValueType Scal = XLenVT, RegisterClass ScalarReg = GPR> {
264 RegisterClass ScalarRegClass = ScalarReg;
278 RegisterClass ScalarReg = GPR>
279 : VTypeInfo<Vec, Mas, Sew, M, Scal, ScalarReg> {
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 5133 auto [DstReg, DstTy, ScalarReg, ScalarTy, SrcReg, SrcTy] = in fewerElementsVectorSeqReductions()
5149 Register Acc = ScalarReg; in fewerElementsVectorSeqReductions()
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