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Searched refs:SWR (Results 1 – 12 of 12) sorted by relevance

/freebsd/sys/contrib/device-tree/src/arm/marvell/
H A Dkirkwood-mv88f6281gtw-ge.dts98 label = "SWR Button";
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsNaClELFStreamer.cpp241 case Mips::SWR: in isBasePlusOffsetMemoryAccess()
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZInstrHFP.td164 def SWR : BinaryRR<"swr", 0x2F, null_frag, FP64, FP64>;
/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/
H A DCodeGenSchedule.cpp1909 for (Record *SWR : SWRDefs) { in collectProcResources()
1910 Record *ModelDef = SWR->getValueAsDef("SchedModel"); in collectProcResources()
1911 addWriteRes(SWR, getProcModel(ModelDef).Index); in collectProcResources()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsISelLowering.h253 SWR, enumerator
H A DMipsInstructionSelector.cpp468 if (!buildUnalignedStore(I, Mips::SWR, BaseAddr, SignedOffset, MMO)) in select()
H A DMipsISelLowering.cpp225 case MipsISD::SWR: return "MipsISD::SWR"; in getTargetNodeName()
2799 return createStoreLR(MipsISD::SWR, DAG, SD, SWL, IsLittle ? 0 : 3); in lowerUnalignedIntStore()
4948 BuildMI(*BB, I, DL, TII->get(Mips::SWR)) in emitSTR_W()
5032 BuildMI(*BB, I, DL, TII->get(Mips::SWR)) in emitSTR_D()
5040 BuildMI(*BB, I, DL, TII->get(Mips::SWR)) in emitSTR_D()
H A DMipsScheduleP5600.td144 SBE, SHE, SWE, SCE, SWL, SWR, SWLE, SWRE)>;
H A DMipsScheduleGeneric.td576 def : InstRW<[GenericWriteStore], (instrs SWL, SWR)>;
H A DMipsInstrInfo.td145 def MipsSWR : SDNode<"MipsISD::SWR", SDTStore,
2133 def SWR : MMRel, StoreLeftRight<"swr", MipsSWR, GPR32Opnd, II_SWR>, LW_FM<0x2e>,
/freebsd/sys/dev/axgbe/
H A Dxgbe-dev.c1623 XGMAC_IOWRITE_BITS(pdata, DMA_MR, SWR, 1); in __xgbe_exit()
1627 while (--count && XGMAC_IOREAD_BITS(pdata, DMA_MR, SWR)) in __xgbe_exit()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp4590 unsigned XWR = IsLoadInst ? Mips::LWR : Mips::SWR; in expandUxw()