Searched refs:SVEDataVector (Results 1 – 2 of 2) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 71 SVEDataVector, enumerator 1287 RK = RegKind::SVEDataVector; in isSVEVectorReg() 1348 if (Kind != k_Register || Reg.Kind != RegKind::SVEDataVector) in isSVEDataVectorRegOfWidth() 2335 assert((Kind == RegKind::NeonVector || Kind == RegKind::SVEDataVector || in CreateVectorReg() 2772 case RegKind::SVEDataVector: in parseVectorKind() 3013 return Kind == RegKind::SVEDataVector ? RegNum : 0; in matchRegisterNameAlias() 3062 case RegKind::SVEDataVector: in getNumRegsForRegKind() 7445 RegisterKind = RegKind::SVEDataVector; in parseDirectiveReq() 7447 tryParseVectorRegister(RegNum, Kind, RegKind::SVEDataVector); in parseDirectiveReq() 7880 tryParseVectorRegister(RegNum, Kind, RegKind::SVEDataVector); in parseDirectiveSEHSaveZReg() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64RegisterInfo.td | 1329 let ParserMethod = "tryParseVectorList<RegKind::SVEDataVector>"; 1331 "isTypedVectorList<RegKind::SVEDataVector, " #NumRegs #", 0, " #ElementWidth #">"; 1429 "isTypedVectorListMultiple<RegKind::SVEDataVector, " 1593 let PredicateMethod = "isTypedVectorListStrided<RegKind::SVEDataVector, "
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