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Searched refs:SUB (Results 1 – 25 of 199) sorted by relevance

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/freebsd/contrib/byacc/test/btyacc/
H A Dquote_calc2-s.output12 8 | expr "SUB" expr
18 14 | "SUB" expr
41 "SUB" shift 3
60 expr : "SUB" . expr (14)
62 "SUB" shift 3
84 "SUB" reduce 15
96 "SUB" shift 3
116 expr : expr . "SUB" expr (8)
124 "SUB" shift 17
139 "SUB" reduce 16
[all …]
H A Dquote_calc2.output12 8 | expr "SUB" expr
18 14 | "SUB" expr
41 "SUB" shift 3
60 expr : "SUB" . expr (14)
62 "SUB" shift 3
84 "SUB" reduce 15
96 "SUB" shift 3
116 expr : expr . "SUB" expr (8)
124 "SUB" shift 17
139 "SUB" reduce 16
[all …]
H A Dquote_calc4-s.output12 8 | expr "SUB-operator" expr
18 14 | "SUB-operator" expr
41 "SUB-operator" shift 3
60 expr : "SUB-operator" . expr (14)
62 "SUB-operator" shift 3
84 "SUB-operator" reduce 15
96 "SUB-operator" shift 3
116 expr : expr . "SUB-operator" expr (8)
124 "SUB-operator" shift 17
139 "SUB-operator" reduce 16
[all …]
H A Dquote_calc4.output12 8 | expr "SUB-operator" expr
18 14 | "SUB-operator" expr
41 "SUB-operator" shift 3
60 expr : "SUB-operator" . expr (14)
62 "SUB-operator" shift 3
84 "SUB-operator" reduce 15
96 "SUB-operator" shift 3
116 expr : expr . "SUB-operator" expr (8)
124 "SUB-operator" shift 17
139 "SUB-operator" reduce 16
[all …]
H A Dquote_calc.tab.h7 #define SUB 260 macro
H A Dquote_calc2.tab.h7 #define SUB 260 macro
/freebsd/contrib/byacc/test/yacc/
H A Dquote_calc2-s.output12 8 | expr "SUB" expr
18 14 | "SUB" expr
41 "SUB" shift 3
60 expr : "SUB" . expr (14)
62 "SUB" shift 3
84 "SUB" reduce 15
96 "SUB" shift 3
116 expr : expr . "SUB" expr (8)
124 "SUB" shift 17
139 "SUB" reduce 16
[all …]
H A Dquote_calc2.output12 8 | expr "SUB" expr
18 14 | "SUB" expr
41 "SUB" shift 3
60 expr : "SUB" . expr (14)
62 "SUB" shift 3
84 "SUB" reduce 15
96 "SUB" shift 3
116 expr : expr . "SUB" expr (8)
124 "SUB" shift 17
139 "SUB" reduce 16
[all …]
H A Dquote_calc4-s.output12 8 | expr "SUB-operator" expr
18 14 | "SUB-operator" expr
41 "SUB-operator" shift 3
60 expr : "SUB-operator" . expr (14)
62 "SUB-operator" shift 3
84 "SUB-operator" reduce 15
96 "SUB-operator" shift 3
116 expr : expr . "SUB-operator" expr (8)
124 "SUB-operator" shift 17
139 "SUB-operator" reduce 16
[all …]
H A Dquote_calc4.output12 8 | expr "SUB-operator" expr
18 14 | "SUB-operator" expr
41 "SUB-operator" shift 3
60 expr : "SUB-operator" . expr (14)
62 "SUB-operator" shift 3
84 "SUB-operator" reduce 15
96 "SUB-operator" shift 3
116 expr : expr . "SUB-operator" expr (8)
124 "SUB-operator" shift 17
139 "SUB-operator" reduce 16
[all …]
H A Dquote_calc.tab.h4 #define SUB 260 macro
H A Dquote_calc2.tab.h4 #define SUB 260 macro
/freebsd/contrib/bsnmp/snmpd/
H A Dsnmpmod.h79 #define NEXT_OBJECT_OID_LINK_INDEX_TYPE(LIST, OID, SUB, LINK, INDEX, TYPE) ({\ argument
83 if (index_compare(OID, SUB, &_lelem->INDEX) < 0) \
88 #define FIND_OBJECT_OID_LINK_INDEX_TYPE(LIST, OID, SUB, LINK, INDEX, TYPE) ({\ argument
92 if (index_compare(OID, SUB, &_lelem->INDEX) == 0) \
149 #define FIND_OBJECT_OID_LINK_INDEX(LIST, OID, SUB, LINK, INDEX) ({ \ argument
153 if (index_compare(OID, SUB, &_lelem->INDEX) == 0) \
158 #define NEXT_OBJECT_OID_LINK_INDEX(LIST, OID, SUB, LINK, INDEX) ({ \ argument
162 if (index_compare(OID, SUB, &_lelem->INDEX) < 0) \
167 #define FIND_OBJECT_INT_LINK_INDEX(LIST, OID, SUB, LINK, INDEX) ({ \ argument
170 if ((OID)->len - SUB != 1) \
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiAluCode.h24 SUB = 0x02,
81 case SUB: in lanaiAluCodeToString()
106 .Case("sub", SUB) in stringToLanaiAluCode()
25 SUB = 0x02, global() enumerator
/freebsd/crypto/openssl/crypto/bn/asm/
H A Dbn-c64xplus.asm173 [A2] SUB A1:A0,1,A1:A0
200 [!A1] SUB A3,A6,A3 ; hi-=dv
209 [!A1] SUB A3,A6,A3 ; hi-=dv
236 || SUB B0,2,B1 ; N-2, initial ILC
237 || SUB B0,1,B2 ; const B2=N-1
247 || SUB A0,1,A0
272 || [A0] SUB.L A0,1,A0
/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCISelDAGToDAG.cpp98 if (Addr.getOpcode() != ISD::ADD && Addr.getOpcode() != ISD::SUB && in SelectAddrModeS9()
114 if (Addr.getOpcode() == ISD::SUB) in SelectAddrModeS9()
143 if (Addr.getOpcode() == ISD::SUB) in SelectAddrModeFar()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SchedTSV110.td370 def : InstRW<[TSV110Wr_1cyc_1ALUAB], (instregex "(ADD|AND|EOR|ORR|SUB)[WX]r(r|i)")>;
371 def : InstRW<[TSV110Wr_1cyc_1AB], (instregex "(ADD|AND|EOR|ORR|SUB)S[WX]r(r|i)")>;
383 def : InstRW<[TSV110WrISReg], (instregex "^(ADD|AND|BIC|EON|EOR|ORN|ORR|SUB)[WX]rs$")>;
388 def : InstRW<[TSV110WrISRegBr], (instregex "^(ADD|AND|BIC|EON|EOR|ORN|ORR|SUB)S[WX]rs$")>;
396 def : InstRW<[TSV110WrIEReg], (instregex "^(ADD|SUB)[WX]r(x|x64)$")>;
401 def : InstRW<[TSV110WrIERegBr], (instregex "^(ADD|SUB)S[WX]r(x|x64)$")>;
496 def : InstRW<[TSV110Wr_4cyc_1F], (instregex "^FN?M(ADD|SUB)Hrrr")>;
497 def : InstRW<[TSV110Wr_5cyc_1F], (instregex "^FN?M(ADD|SUB)Srrr")>;
498 def : InstRW<[TSV110Wr_7cyc_1F], (instregex "^FN?M(ADD|SUB)Drrr")>;
500 def : InstRW<[TSV110Wr_4cyc_1F], (instregex "^F(ADD|SUB)Hrr")>;
[all …]
H A DAArch64SchedExynosM5.td635 def : InstRW<[M5WriteAXW], (instregex "^(ADD|AND|BIC|EON|EOR|ORN|SUB)Wrs$")>;
636 def : InstRW<[M5WriteAXX], (instregex "^(ADD|AND|BIC|EON|EOR|ORN|SUB)Xrs$")>;
639 def : InstRW<[M5WriteAXW], (instregex "^(ADD|AND|BIC|SUB)SWrs$")>;
640 def : InstRW<[M5WriteAXX], (instregex "^(ADD|AND|BIC|SUB)SXrs$")>;
641 def : InstRW<[M5WriteAXW], (instregex "^(ADD|SUB)S?Wrx(64)?$")>;
642 def : InstRW<[M5WriteAXX], (instregex "^(ADD|SUB)S?Xrx(64)?$")>;
700 def : InstRW<[M5WriteFADD2], (instregex "^F(ADD|SUB)[HSD]rr")>;
712 M5ReadFMACM1], (instregex "^FN?M(ADD|SUB)[HSD]rrr")>;
779 def : InstRW<[M5WriteNALU2], (instregex "^(ADD|NEG|SUB)v")>;
781 def : InstRW<[M5WriteNHAD3], (instregex "^[SU]H(ADD|SUB)v")>;
[all …]
H A DAArch64SchedExynosM4.td597 def : InstRW<[M4WriteAX], (instregex "^(ADD|AND|BIC|EON|EOR|ORN|SUB)[WX]rs$")>;
599 def : InstRW<[M4WriteAX], (instregex "^(ADD|AND|BIC|SUB)S[WX]rs$")>;
600 def : InstRW<[M4WriteAX], (instregex "^(ADD|SUB)S?[WX]rx(64)?$")>;
634 def : InstRW<[M4WriteFADD2H], (instregex "^F(ADD|SUB)Hrr")>;
635 def : InstRW<[M4WriteFADD2], (instregex "^F(ADD|SUB)[SD]rr")>;
650 M4ReadFMACM1], (instregex "^FN?M(ADD|SUB)Hrrr")>;
652 M4ReadFMACM1], (instregex "^FN?M(ADD|SUB)[SD]rrr")>;
731 def : InstRW<[M4WriteNALU1], (instregex "^(ADD|NEG|SUB)v")>;
733 def : InstRW<[M4WriteNHAD3], (instregex "^[SU]H(ADD|SUB)v")>;
734 def : InstRW<[M4WriteNHAD3], (instregex "^[SU](ADD|SUB)[LW]v")>;
[all …]
H A DAArch64SchedExynosM3.td501 def : InstRW<[M3WriteAX], (instregex "^(ADD|AND|BIC|EON|EOR|ORN|SUB)[WX]rs$")>;
503 def : InstRW<[M3WriteAX], (instregex "^(ADD|SUB)S?[WX]rx(64)?$")>;
504 def : InstRW<[M3WriteAX], (instregex "^(ADD|AND|BIC|SUB)S[WX]rs$")>;
538 def : InstRW<[M3WriteFADD2], (instregex "^F(ADD|SUB)[DS]rr")>;
544 M3ReadFMAC], (instregex "^FN?M(ADD|SUB)[DS]rrr")>;
611 def : InstRW<[M3WriteNALU1], (instregex "^(ADD|NEG|SUB)v")>;
613 def : InstRW<[M3WriteNMSC3], (instregex "^[SU]H(ADD|SUB)v")>;
614 def : InstRW<[M3WriteNMSC3], (instregex "^[SU](ADD|SUB)[LW]V?v")>;
615 def : InstRW<[M3WriteNMSC3], (instregex "^R?(ADD|SUB)HN2?v")>;
616 def : InstRW<[M3WriteNMSC3], (instregex "^[SU]Q(ADD|SUB)
[all...]
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86SchedSapphireRapids.td565 def : InstRW<[SPRWriteResGroup5, ReadAfterLd], (instregex "^(ADD|CMP|SUB)(8|16|32|64)rm$",
573 def : InstRW<[SPRWriteResGroup6], (instregex "^(ADD|SUB)64ri8$",
600 def : InstRW<[SPRWriteResGroup8, ReadAfterVecXLd], (instregex "^(V?)(ADD|SUB)PSrm$",
602 "^V(ADD|SUB)PSZ128rm((b|k|bk|kz)?)$",
603 "^V(ADD|SUB)PSZ128rmbkz$")>;
608 def : InstRW<[SPRWriteResGroup9], (instregex "^(V?)(ADD|SUB)PSrr$",
610 "^V(ADD|SUB)PSYrr$",
611 "^V(ADD|SUB)PSZ(128|256)rr(k?)$",
624 "^SUB(R?)_F(32|64)m$",
650 "^SUB(R?)_FI(16|32)m$")>;
[all …]
/freebsd/contrib/ntp/include/
H A Dascii.h67 #define SUB 26 macro
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsISelDAGToDAG.cpp259 ISD::SUB, DL, VT, {CurDAG->getConstant(0, DL, VT), C}); in selectVecAddAsVecSubIfProfitable()
261 SDValue NewNode = CurDAG->getNode(ISD::SUB, DL, VT, X, NegC); in selectVecAddAsVecSubIfProfitable()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVOptWInstrs.cpp301 case RISCV::SUB: in hasAllNBitUsers()
596 case RISCV::SUB: in isSignExtendedW()
623 case RISCV::SUB: in getWOp()
727 case RISCV::SUB: in appendWSuffixes()
/freebsd/contrib/byacc/test/
H A Dbtyacc_demo.y22 enum Operator { ADD, SUB, MUL, MOD, DIV, DEREF }; enumerator
173 | expr '-' expr($e) { $$ = build_expr($1, SUB, $3); }

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