| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 491 STRICT_FSETCCS, enumerator
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| H A D | SelectionDAG.h | 1241 return getNode(IsSignaling ? ISD::STRICT_FSETCCS : ISD::STRICT_FSETCC, DL,
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorOps.cpp | 318 Op.getOpcode() == ISD::STRICT_FSETCCS) { in LegalizeOp()
1699 Node->getOpcode() == ISD::STRICT_FSETCCS; in ExpandSETCC()
1700 bool IsSignaling = Node->getOpcode() == ISD::STRICT_FSETCCS; in ExpandSETCC()
1820 Node->getOpcode() == ISD::STRICT_FSETCCS) { in ExpandStrictFPOp()
1960 Node->getOpcode() == ISD::STRICT_FSETCCS) in UnrollStrictFPOp()
1994 Node->getOpcode() == ISD::STRICT_FSETCCS) in UnrollStrictFPOp()
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| H A D | LegalizeDAG.cpp | 1039 case ISD::STRICT_FSETCCS: in LegalizeOp()
1047 : Opc == ISD::STRICT_FSETCCS ? 3 in LegalizeOp()
1053 : Opc == ISD::STRICT_FSETCCS ? 1 in LegalizeOp()
4097 case ISD::STRICT_FSETCCS: { in ExpandNode()
4100 Node->getOpcode() == ISD::STRICT_FSETCCS; in ExpandNode()
4101 bool IsSignaling = Node->getOpcode() == ISD::STRICT_FSETCCS; in ExpandNode()
5098 Node->getOpcode() == ISD::STRICT_FSETCCS || in PromoteNode()
5384 case ISD::STRICT_FSETCCS: { in PromoteNode()
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| H A D | SelectionDAGDumper.cpp | 319 case ISD::STRICT_FSETCCS: return "strict_fsetccs"; in getOperationName()
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| H A D | LegalizeFloatTypes.cpp | 1023 case ISD::STRICT_FSETCCS: in SoftenFloatOperand()
1212 Chain, N->getOpcode() == ISD::STRICT_FSETCCS); in SoftenFloatOp_SETCC()
2089 case ISD::STRICT_FSETCCS: in ExpandFloatOperand()
2260 N->getOpcode() == ISD::STRICT_FSETCCS); in ExpandFloatOp_SETCC()
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| H A D | LegalizeVectorTypes.cpp | 4833 case ISD::STRICT_FSETCCS: in WidenVecRes_StrictFP()
5899 case ISD::STRICT_FSETCCS: in isSETCCOp()
6388 case ISD::STRICT_FSETCCS: Res = WidenVecOp_STRICT_FSETCC(N); break; in WidenVectorOperand()
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| H A D | SelectionDAGISel.cpp | 1311 case ISD::STRICT_FSETCCS: in DoInstructionSelection()
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| H A D | SelectionDAG.cpp | 3574 case ISD::STRICT_FSETCCS: { in computeKnownBits()
4731 case ISD::STRICT_FSETCCS: { in ComputeNumSignBits()
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| H A D | LegalizeIntegerTypes.cpp | 101 case ISD::STRICT_FSETCCS: in PromoteIntegerResult()
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| H A D | DAGCombiner.cpp | 978 N.getOpcode() == ISD::STRICT_FSETCCS)) { in isSetCCEquivalent()
9470 case ISD::STRICT_FSETCCS: { in visitXOR()
9476 N0.getOperand(0), N0Opcode == ISD::STRICT_FSETCCS); in visitXOR()
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| H A D | SelectionDAGBuilder.cpp | 8222 case ISD::STRICT_FSETCCS: { in visitConstrainedFPIntrinsic()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 525 setOperationAction(ISD::STRICT_FSETCCS, MVT::f32, Legal); in PPCTargetLowering()
526 setOperationAction(ISD::STRICT_FSETCCS, MVT::f64, Legal); in PPCTargetLowering()
527 setOperationAction(ISD::STRICT_FSETCCS, MVT::f128, Legal); in PPCTargetLowering()
546 setOperationAction(ISD::STRICT_FSETCCS, MVT::f32, Legal); in PPCTargetLowering()
547 setOperationAction(ISD::STRICT_FSETCCS, MVT::f64, Legal); in PPCTargetLowering()
1298 setOperationAction(ISD::STRICT_FSETCCS, MVT::f128, Custom); in PPCTargetLowering()
3741 Op->getOpcode() == ISD::STRICT_FSETCCS); in LowerSETCC()
11808 case ISD::STRICT_FSETCCS: in LowerOperation()
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| H A D | PPCISelDAGToDAG.cpp | 5459 case ISD::STRICT_FSETCCS: in Select()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 154 setOperationAction(ISD::STRICT_FSETCCS, VT, Custom); in SystemZTargetLowering()
604 setOperationAction(ISD::STRICT_FSETCCS, MVT::v2f64, Custom); in SystemZTargetLowering()
605 setOperationAction(ISD::STRICT_FSETCCS, MVT::v4f32, Custom); in SystemZTargetLowering()
6132 case ISD::STRICT_FSETCCS: in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 435 ISD::STRICT_FSQRT, ISD::STRICT_FSETCC, ISD::STRICT_FSETCCS}; in RISCVTargetLowering()
459 ISD::STRICT_FSQRT, ISD::STRICT_FSETCC, ISD::STRICT_FSETCCS, in RISCVTargetLowering()
1036 setOperationAction({ISD::STRICT_FSETCC, ISD::STRICT_FSETCCS, in RISCVTargetLowering()
1392 ISD::STRICT_FSETCC, ISD::STRICT_FSETCCS, ISD::STRICT_FTRUNC, in RISCVTargetLowering()
7093 case ISD::STRICT_FSETCCS: in LowerOperation()
11026 if (Opc == ISD::STRICT_FSETCCS) { in lowerVectorStrictFSetcc()
11032 SDValue Tmp1 = DAG.getNode(ISD::STRICT_FSETCCS, DL, VTList, Chain, Op1, in lowerVectorStrictFSetcc()
11034 SDValue Tmp2 = DAG.getNode(ISD::STRICT_FSETCCS, DL, VTList, Chain, Op2, in lowerVectorStrictFSetcc()
11047 SDValue OEQ = DAG.getNode(ISD::STRICT_FSETCCS, DL, VTList, Chain, Op1, in lowerVectorStrictFSetcc()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 175 setOperationAction(ISD::STRICT_FSETCCS, MVT::f32, Legal); in LoongArchTargetLowering()
209 setOperationAction(ISD::STRICT_FSETCCS, MVT::f64, Legal); in LoongArchTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 667 def strict_fsetccs : SDNode<"ISD::STRICT_FSETCCS", SDTSetCC, [SDNPHasChain]>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 488 setOperationAction(ISD::STRICT_FSETCCS, MVT::f16, Custom); in AArch64TargetLowering()
489 setOperationAction(ISD::STRICT_FSETCCS, MVT::f32, Custom); in AArch64TargetLowering()
490 setOperationAction(ISD::STRICT_FSETCCS, MVT::f64, Custom); in AArch64TargetLowering()
554 setOperationAction(ISD::STRICT_FSETCCS, MVT::f128, Custom); in AArch64TargetLowering()
1938 setOperationAction(ISD::STRICT_FSETCCS, VT, Expand); in addTypeForNEON()
6768 case ISD::STRICT_FSETCCS: in LowerOperation()
10315 bool IsSignaling = Op.getOpcode() == ISD::STRICT_FSETCCS; in LowerSETCC()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 490 setOperationAction(ISD::STRICT_FSETCCS, VT, Custom); in X86TargetLowering()
704 setOperationAction(ISD::STRICT_FSETCCS, MVT::f16, Promote); in X86TargetLowering()
1166 setOperationAction(ISD::STRICT_FSETCCS, MVT::v2f64, Custom); in X86TargetLowering()
1167 setOperationAction(ISD::STRICT_FSETCCS, MVT::v4f32, Custom); in X86TargetLowering()
1546 setOperationAction(ISD::STRICT_FSETCCS, MVT::v4f64, Custom); in X86TargetLowering()
1547 setOperationAction(ISD::STRICT_FSETCCS, MVT::v8f32, Custom); in X86TargetLowering()
1942 setOperationAction(ISD::STRICT_FSETCCS, MVT::v8f64, Custom); in X86TargetLowering()
1943 setOperationAction(ISD::STRICT_FSETCCS, MVT::v16f32, Custom); in X86TargetLowering()
2216 setOperationAction(ISD::STRICT_FSETCCS, VT, Custom); in X86TargetLowering()
23249 Op.getOpcode() == ISD::STRICT_FSETCCS; in LowerVSETCC()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 1495 setOperationAction(ISD::STRICT_FSETCCS, MVT::f16, Custom); in ARMTargetLowering()
1497 setOperationAction(ISD::STRICT_FSETCCS, MVT::f32, Custom); in ARMTargetLowering()
1499 setOperationAction(ISD::STRICT_FSETCCS, MVT::f64, Custom); in ARMTargetLowering()
10520 bool IsSignaling = Op.getOpcode() == ISD::STRICT_FSETCCS; in LowerFSETCC()
10689 case ISD::STRICT_FSETCCS: return LowerFSETCC(Op, DAG); in LowerOperation()
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