| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 409 STRICT_FMUL, enumerator
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 290 case ISD::STRICT_FMUL: return "strict_fmul"; in getOperationName()
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| H A D | LegalizeVectorOps.cpp | 689 case ISD::STRICT_FMUL: in Promote()
1638 fHI = DAG.getNode(ISD::STRICT_FMUL, DL, {Node->getValueType(0), MVT::Other}, in ExpandUINT_TO_FLOAT()
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| H A D | LegalizeFloatTypes.cpp | 110 case ISD::STRICT_FMUL: in SoftenFloatResult()
1440 case ISD::STRICT_FMUL: in ExpandFloatResult()
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| H A D | LegalizeDAG.cpp | 4760 case ISD::STRICT_FMUL: in ConvertNodeToLibcall()
5449 case ISD::STRICT_FMUL: in PromoteNode()
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| H A D | SelectionDAGBuilder.cpp | 8201 SDValue Mul = DAG.getNode(ISD::STRICT_FMUL, sdl, VTs, Opers, Flags); in visitConstrainedFPIntrinsic()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 539 setOperationAction(ISD::STRICT_FMUL, VT, Legal); in SystemZTargetLowering()
588 setOperationAction(ISD::STRICT_FMUL, MVT::v2f64, Legal); in SystemZTargetLowering()
654 setOperationAction(ISD::STRICT_FMUL, MVT::v4f32, Legal); in SystemZTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 434 ISD::STRICT_FSUB, ISD::STRICT_FMUL, ISD::STRICT_FDIV, in RISCVTargetLowering()
458 ISD::STRICT_FSUB, ISD::STRICT_FMUL, ISD::STRICT_FDIV, in RISCVTargetLowering()
952 ISD::FMINIMUM, ISD::STRICT_FADD, ISD::STRICT_FSUB, ISD::STRICT_FMUL, in RISCVTargetLowering()
1033 setOperationAction({ISD::STRICT_FADD, ISD::STRICT_FSUB, ISD::STRICT_FMUL, in RISCVTargetLowering()
1390 {ISD::STRICT_FADD, ISD::STRICT_FSUB, ISD::STRICT_FMUL, in RISCVTargetLowering()
5996 OP_CASE(STRICT_FMUL) in getRISCVVLOp()
7083 case ISD::STRICT_FMUL: in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 362 setOperationAction(ISD::STRICT_FMUL, MVT::f32, Legal); in PPCTargetLowering()
368 setOperationAction(ISD::STRICT_FMUL, MVT::f64, Legal); in PPCTargetLowering()
1150 setOperationAction(ISD::STRICT_FMUL, MVT::v4f32, Legal); in PPCTargetLowering()
1164 setOperationAction(ISD::STRICT_FMUL, MVT::v2f64, Legal); in PPCTargetLowering()
1248 setOperationAction(ISD::STRICT_FMUL, MVT::f128, Legal); in PPCTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 573 def strict_fmul : SDNode<"ISD::STRICT_FMUL",
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 684 setOperationAction(ISD::STRICT_FMUL, MVT::f16, Promote); in X86TargetLowering()
798 setOperationAction(ISD::STRICT_FMUL, MVT::f32, Legal); in X86TargetLowering()
799 setOperationAction(ISD::STRICT_FMUL, MVT::f64, Legal); in X86TargetLowering()
860 setOperationAction(ISD::STRICT_FMUL , MVT::f80, Legal); in X86TargetLowering()
888 setOperationAction(ISD::STRICT_FMUL, MVT::f128, LibCall); in X86TargetLowering()
1064 setOperationAction(ISD::STRICT_FMUL, MVT::v4f32, Legal); in X86TargetLowering()
1301 setOperationAction(ISD::STRICT_FMUL, MVT::v2f64, Legal); in X86TargetLowering()
1480 setOperationAction(ISD::STRICT_FMUL, MVT::v8f32, Legal); in X86TargetLowering()
1481 setOperationAction(ISD::STRICT_FMUL, MVT::v4f64, Legal); in X86TargetLowering()
1830 setOperationAction(ISD::STRICT_FMUL, MVT::v16f32, Legal); in X86TargetLowering()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 779 ISD::STRICT_FMUL, in AArch64TargetLowering()
881 for (auto Op : {ISD::STRICT_FADD, ISD::STRICT_FSUB, ISD::STRICT_FMUL, in AArch64TargetLowering()
1196 ISD::STRICT_FADD, ISD::STRICT_FSUB, ISD::STRICT_FMUL, in AArch64TargetLowering()
1916 ISD::STRICT_FMUL, ISD::STRICT_FDIV, ISD::STRICT_FMA, in addTypeForNEON()
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