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Searched refs:STEP_VECTOR (Results 1 – 10 of 10) sorted by relevance

/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h660 STEP_VECTOR, enumerator
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp337 case ISD::STEP_VECTOR: return "step_vector"; in getOperationName()
H A DSelectionDAG.cpp2068 ISD::STEP_VECTOR, DL, ResVT, in getStepVector()
3194 case ISD::STEP_VECTOR: { in computeKnownBits()
5943 case ISD::STEP_VECTOR: { in getNode()
5952 case ISD::STEP_VECTOR: in getNode()
6461 case ISD::STEP_VECTOR: in FoldConstantArithmetic()
6649 Ops[0].getOpcode() == ISD::STEP_VECTOR) { in FoldConstantArithmetic()
6890 N2.getOpcode() == ISD::STEP_VECTOR) in canonicalizeCommutativeBinop()
H A DLegalizeVectorOps.cpp1515 (!TLI.isOperationLegalOrCustom(ISD::STEP_VECTOR, EVLVecVT) || in ExpandVP_MERGE()
H A DLegalizeVectorTypes.cpp1097 case ISD::STEP_VECTOR: in SplitVectorResult()
1986 "Only scalable vectors are supported for STEP_VECTOR"); in SplitVecRes_STEP_VECTOR()
1990 Lo = DAG.getNode(ISD::STEP_VECTOR, dl, LoVT, Step); in SplitVecRes_STEP_VECTOR()
2000 Hi = DAG.getNode(ISD::STEP_VECTOR, dl, HiVT, Step); in SplitVecRes_ScalarOp()
4328 case ISD::STEP_VECTOR: in WidenVectorResult()
H A DDAGCombiner.cpp2995 if (N0.getOpcode() == ISD::STEP_VECTOR && in visitADD()
2996 N1.getOpcode() == ISD::STEP_VECTOR) { in visitADD()
3005 N0.getOperand(1).getOpcode() == ISD::STEP_VECTOR && in visitADD()
3006 N1.getOpcode() == ISD::STEP_VECTOR) { in visitADD()
4062 if (N1.getOpcode() == ISD::STEP_VECTOR && N1.hasOneUse()) { in visitSUB()
4504 if (!UseVP && N0.getOpcode() == ISD::STEP_VECTOR && in visitMUL()
10157 if (N0.getOpcode() == ISD::STEP_VECTOR && in visitSHL()
H A DLegalizeIntegerTypes.cpp146 case ISD::STEP_VECTOR: Res = PromoteIntRes_STEP_VECTOR(N); break; in PromoteIntegerResult()
/freebsd/contrib/llvm-project/llvm/include/llvm/Target/
H A DTargetSelectionDAG.td786 def step_vector : SDNode<"ISD::STEP_VECTOR", SDTypeProfile<1, 1,
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp1115 ISD::VECREDUCE_ADD, ISD::STEP_VECTOR}); in AArch64TargetLowering()
23107 if (Index.getOpcode() == ISD::STEP_VECTOR) { in findMoreOptimalIndexType()
23113 Index.getOperand(0).getOpcode() == ISD::STEP_VECTOR) { in findMoreOptimalIndexType()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp885 setOperationAction({ISD::STEP_VECTOR, ISD::VECTOR_REVERSE}, VT, Custom); in RISCVTargetLowering()
6832 case ISD::STEP_VECTOR: in LowerOperation()