Searched refs:STEP_VECTOR (Results 1 – 10 of 10) sorted by relevance
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | ISDOpcodes.h | 660 STEP_VECTOR, enumerator
|
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGDumper.cpp | 337 case ISD::STEP_VECTOR: return "step_vector"; in getOperationName()
|
H A D | SelectionDAG.cpp | 2068 ISD::STEP_VECTOR, DL, ResVT, in getStepVector() 3194 case ISD::STEP_VECTOR: { in computeKnownBits() 5943 case ISD::STEP_VECTOR: { in getNode() 5952 case ISD::STEP_VECTOR: in getNode() 6461 case ISD::STEP_VECTOR: in FoldConstantArithmetic() 6649 Ops[0].getOpcode() == ISD::STEP_VECTOR) { in FoldConstantArithmetic() 6890 N2.getOpcode() == ISD::STEP_VECTOR) in canonicalizeCommutativeBinop()
|
H A D | LegalizeVectorOps.cpp | 1515 (!TLI.isOperationLegalOrCustom(ISD::STEP_VECTOR, EVLVecVT) || in ExpandVP_MERGE()
|
H A D | LegalizeVectorTypes.cpp | 1097 case ISD::STEP_VECTOR: in SplitVectorResult() 1986 "Only scalable vectors are supported for STEP_VECTOR"); in SplitVecRes_STEP_VECTOR() 1990 Lo = DAG.getNode(ISD::STEP_VECTOR, dl, LoVT, Step); in SplitVecRes_STEP_VECTOR() 2000 Hi = DAG.getNode(ISD::STEP_VECTOR, dl, HiVT, Step); in SplitVecRes_ScalarOp() 4328 case ISD::STEP_VECTOR: in WidenVectorResult()
|
H A D | DAGCombiner.cpp | 2995 if (N0.getOpcode() == ISD::STEP_VECTOR && in visitADD() 2996 N1.getOpcode() == ISD::STEP_VECTOR) { in visitADD() 3005 N0.getOperand(1).getOpcode() == ISD::STEP_VECTOR && in visitADD() 3006 N1.getOpcode() == ISD::STEP_VECTOR) { in visitADD() 4062 if (N1.getOpcode() == ISD::STEP_VECTOR && N1.hasOneUse()) { in visitSUB() 4504 if (!UseVP && N0.getOpcode() == ISD::STEP_VECTOR && in visitMUL() 10157 if (N0.getOpcode() == ISD::STEP_VECTOR && in visitSHL()
|
H A D | LegalizeIntegerTypes.cpp | 146 case ISD::STEP_VECTOR: Res = PromoteIntRes_STEP_VECTOR(N); break; in PromoteIntegerResult()
|
/freebsd/contrib/llvm-project/llvm/include/llvm/Target/ |
H A D | TargetSelectionDAG.td | 786 def step_vector : SDNode<"ISD::STEP_VECTOR", SDTypeProfile<1, 1,
|
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 1115 ISD::VECREDUCE_ADD, ISD::STEP_VECTOR}); in AArch64TargetLowering() 23107 if (Index.getOpcode() == ISD::STEP_VECTOR) { in findMoreOptimalIndexType() 23113 Index.getOperand(0).getOpcode() == ISD::STEP_VECTOR) { in findMoreOptimalIndexType()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 885 setOperationAction({ISD::STEP_VECTOR, ISD::VECTOR_REVERSE}, VT, Custom); in RISCVTargetLowering() 6832 case ISD::STEP_VECTOR: in LowerOperation()
|