| /freebsd/sys/contrib/device-tree/Bindings/rtc/ |
| H A D | brcm,brcmstb-waketimer.txt | 1 Broadcom STB wake-up Timer
3 The Broadcom STB wake-up timer provides a 27Mhz resolution timer, with the
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| /freebsd/sys/contrib/device-tree/Bindings/reset/ |
| H A D | brcm,brcmstb-reset.txt | 1 Broadcom STB SW_INIT-style reset controller
4 Broadcom STB SoCs have a SW_INIT-style reset controller with separate
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| /freebsd/sys/contrib/device-tree/Bindings/usb/ |
| H A D | hisilicon,histb-xhci.txt | 1 HiSilicon STB xHCI
3 The device node for HiSilicon STB xHCI host controller
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| H A D | brcm,bdc.txt | 14 On Broadcom STB platforms, these properties are required:
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| H A D | usb-xhci.txt | 10 - "brcm,bcm7445-xhci" for Broadcom STB SoCs with XHCI
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| /freebsd/sys/contrib/device-tree/Bindings/pci/ |
| H A D | hisilicon-histb-pcie.txt | 1 HiSilicon STB PCIe host bridge DT description
3 The HiSilicon STB PCIe host controller is based on the DesignWare PCIe core.
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| /freebsd/sys/contrib/device-tree/src/arm64/synaptics/ |
| H A D | berlin4ct-stb.dts | 13 model = "Marvell BG4CT STB board";
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| /freebsd/sys/contrib/device-tree/src/arm/broadcom/ |
| H A D | bcm7445-bcm97445svmb.dts | 6 model = "Broadcom STB (bcm7445), SVMB reference board";
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| H A D | bcm7445.dtsi | 7 model = "Broadcom STB (bcm7445)";
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| /freebsd/sys/contrib/device-tree/Bindings/thermal/ |
| H A D | brcm,avs-tmon.txt | 1 * Broadcom STB thermal management
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| /freebsd/contrib/llvm-project/lld/ELF/Arch/ |
| H A D | PPCInsns.def | 18 PCREL_OPT(STB, PSTB, OPC_AND_RST);
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| H A D | PPC64.cpp | 60 STB = 38, enumerator
101 STB = 0x98000000, enumerator
869 return STB << 26; in getPPCDFormOp()
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| /freebsd/sys/contrib/device-tree/Bindings/arm/bcm/ |
| H A D | brcm,brcmstb.txt | 1 ARM Broadcom STB platforms Device Tree Bindings
13 model = "Broadcom STB (bcm7445)";
146 A Broadcom STB SoC typically has a number of independent memory controllers,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFInstrInfo.cpp | 58 StOpc = BPF::STB; in expandMEMCPY()
108 BuildMI(*BB, MI, dl, get(BPF::STB)) in expandMEMCPY()
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| H A D | BPFMISimplifyPatchable.cpp | 107 return Opcode == BPF::STB || Opcode == BPF::STH || Opcode == BPF::STW || in isSTX64()
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| /freebsd/sys/contrib/device-tree/Bindings/mips/brcm/ |
| H A D | soc.txt | 43 A Broadcom STB SoC typically has a number of independent memory controllers,
147 The Broadcom STB chips contain a timer block with several general purpose
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| /freebsd/sys/contrib/device-tree/Bindings/memory-controllers/ |
| H A D | brcm,dpfe-cpu.txt | 1 DDR PHY Front End (DPFE) for Broadcom STB
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| /freebsd/sys/contrib/device-tree/Bindings/phy/ |
| H A D | phy-hi3798cv200-combphy.txt | 1 HiSilicon STB PCIE/SATA/USB3 PHY
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| H A D | brcm,brcmstb-usb-phy.txt | 1 Broadcom STB USB PHY
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| /freebsd/sys/contrib/device-tree/Bindings/mtd/ |
| H A D | brcm,brcmnand.txt | 1 * Broadcom STB NAND Controller
9 This controller was originally designed for STB SoCs (BCM7xxx) but is now
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| /freebsd/sys/contrib/device-tree/Bindings/gpio/ |
| H A D | brcm,brcmstb-gpio.txt | 1 Broadcom STB "UPG GIO" GPIO controller
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| /freebsd/sys/contrib/device-tree/src/arm/allwinner/ |
| H A D | sun8i-h2-plus-bananapi-m2-zero.dts | 254 "PWR-STB", "PWR-DRAM", "PWR-LED", "IR-RX", "", "", "", "",
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| /freebsd/contrib/llvm-project/llvm/lib/ObjectYAML/ |
| H A D | ELFEmitter.cpp | 236 StringTableBuilder &STB,
1043 StringTableBuilder &STB, in initStrtabSectionHeader() argument
1059 if (raw_ostream *OS = CBA.getRawOS(STB.getSize())) in initStrtabSectionHeader()
1060 STB.write(*OS); in initStrtabSectionHeader()
1061 SHeader.sh_size = STB.getSize(); in initStrtabSectionHeader()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCPreEmitPeephole.cpp | 69 case PPC::STB: in hasPCRelativeForm()
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| /freebsd/sys/contrib/device-tree/src/arm/nuvoton/ |
| H A D | nuvoton-npcm730-kudo.dts | 588 // STB-T
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