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Searched refs:SSUBSAT (Results 1 – 22 of 22) sorted by relevance

/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h356 SSUBSAT, enumerator
H A DTargetLowering.h2938 case ISD::SSUBSAT: in isBinOp()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86TargetTransformInfo.cpp3599 { ISD::SSUBSAT, MVT::v32i16, { 1 } }, in getIntrinsicInstrCost()
3600 { ISD::SSUBSAT, MVT::v64i8, { 1 } }, in getIntrinsicInstrCost()
3691 { ISD::SSUBSAT, MVT::v32i16, { 2 } }, in getIntrinsicInstrCost()
3692 { ISD::SSUBSAT, MVT::v64i8, { 2 } }, in getIntrinsicInstrCost()
3812 { ISD::SSUBSAT, MVT::v16i16, { 1 } }, in getIntrinsicInstrCost()
3813 { ISD::SSUBSAT, MVT::v32i8, { 1 } }, in getIntrinsicInstrCost()
3898 { ISD::SSUBSAT, MVT::v16i16, { 4 } }, // 2 x 128-bit Op + extract/insert in getIntrinsicInstrCost()
3899 { ISD::SSUBSAT, MVT::v32i8, { 4 } }, // 2 x 128-bit Op + extract/insert in getIntrinsicInstrCost()
4048 { ISD::SSUBSAT, MVT::v8i16, { 1 } }, in getIntrinsicInstrCost()
4049 { ISD::SSUBSAT, MVT::v16i8, { 1 } }, in getIntrinsicInstrCost()
[all …]
H A DX86ISelLowering.cpp239 setOperationAction(ISD::SSUBSAT , MVT::i8 , Custom); in X86TargetLowering()
240 setOperationAction(ISD::SSUBSAT , MVT::i16 , Custom); in X86TargetLowering()
241 setOperationAction(ISD::SSUBSAT , MVT::i32 , Custom); in X86TargetLowering()
243 setOperationAction(ISD::SSUBSAT , MVT::i64 , Custom); in X86TargetLowering()
1136 setOperationAction(ISD::SSUBSAT, MVT::v16i8, Legal); in X86TargetLowering()
1140 setOperationAction(ISD::SSUBSAT, MVT::v8i16, Legal); in X86TargetLowering()
1358 setOperationAction(ISD::SSUBSAT, MVT::v2i64, Custom); in X86TargetLowering()
1588 setOperationAction(ISD::SSUBSAT, MVT::v32i8, HasInt256 ? Legal : Custom); in X86TargetLowering()
1592 setOperationAction(ISD::SSUBSAT, MVT::v16i16, HasInt256 ? Legal : Custom); in X86TargetLowering()
1965 setOperationAction(ISD::SSUBSAT, VT, HasBWI ? Legal : Custom); in X86TargetLowering()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp359 case ISD::SSUBSAT: return "ssubsat"; in getOperationName()
H A DLegalizeVectorOps.cpp451 case ISD::SSUBSAT: in LegalizeOp()
1041 case ISD::SSUBSAT: in Expand()
H A DSelectionDAG.cpp5259 case ISD::SSUBSAT: in canCreateUndefOrPoison()
6272 case ISD::SSUBSAT: return C1.ssub_sat(C2); in FoldValue()
6978 case ISD::SSUBSAT: in getNode()
6989 if (Opcode == ISD::SSUBSAT || Opcode == ISD::USUBSAT) in getNode()
7344 case ISD::SSUBSAT: in getNode()
7369 case ISD::SSUBSAT: in getNode()
H A DLegalizeIntegerTypes.cpp230 case ISD::SSUBSAT: in PromoteIntegerResult()
1085 case ISD::SSUBSAT: in PromoteIntRes_ADDSUBSHLSAT()
2903 case ISD::SSUBSAT: in ExpandIntegerResult()
H A DLegalizeVectorTypes.cpp161 case ISD::SSUBSAT: in ScalarizeVectorResult()
1276 case ISD::SSUBSAT: case ISD::VP_SSUBSAT: in SplitVectorResult()
4398 case ISD::SSUBSAT: case ISD::VP_SSUBSAT: in WidenVectorResult()
H A DLegalizeDAG.cpp1152 case ISD::SSUBSAT: in LegalizeOp()
3892 case ISD::SSUBSAT: in ExpandNode()
H A DTargetLowering.cpp10356 case ISD::SSUBSAT: in expandAddSubSat()
10401 if (Opcode == ISD::SADDSAT || Opcode == ISD::SSUBSAT) { in expandAddSubSat()
10932 unsigned OpcSat = IsAdd ? ISD::SADDSAT : ISD::SSUBSAT; in expandSADDSUBO()
H A DSelectionDAGBuilder.cpp7192 setValue(&I, DAG.getNode(ISD::SSUBSAT, sdl, Op1.getValueType(), Op1, Op2)); in visitIntrinsicCall()
H A DDAGCombiner.cpp1843 case ISD::SSUBSAT: in visit()
4137 bool IsSigned = Opcode == ISD::SSUBSAT; in visitSUBSAT()
/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DVPIntrinsics.def321 VP_PROPERTY_FUNCTIONAL_SDOPC(SSUBSAT)
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp721 ISD::SSUBSAT, ISD::USUBSAT, in initActions()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp224 for (auto Opcode : {ISD::SADDSAT, ISD::UADDSAT, ISD::SSUBSAT, ISD::USUBSAT}) in addTypeForNEON()
284 setOperationAction(ISD::SSUBSAT, VT, Legal); in addMVEVectorTypes()
1151 setOperationAction(ISD::SSUBSAT, MVT::i8, Custom); in ARMTargetLowering()
1153 setOperationAction(ISD::SSUBSAT, MVT::i16, Custom); in ARMTargetLowering()
1161 setOperationAction(ISD::SSUBSAT, MVT::i32, Legal); in ARMTargetLowering()
5102 case ISD::SSUBSAT: in LowerADDSUBSAT()
5118 case ISD::SSUBSAT: in LowerADDSUBSAT()
7884 case ISD::SSUBSAT: in IsQRMVEInstruction()
10650 case ISD::SSUBSAT: in LowerOperation()
10755 case ISD::SSUBSAT: in ReplaceNodeResults()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp289 setOperationAction({ISD::SADDSAT, ISD::SSUBSAT}, MVT::i32, Custom); in RISCVTargetLowering()
293 setOperationAction({ISD::SADDSAT, ISD::SSUBSAT}, MVT::i32, Custom); in RISCVTargetLowering()
851 ISD::SSUBSAT, ISD::USUBSAT}, in RISCVTargetLowering()
1250 ISD::SSUBSAT, ISD::USUBSAT}, in RISCVTargetLowering()
5977 OP_CASE(SSUBSAT) in getRISCVVLOp()
6024 VP_CASE(SSUBSAT) // VP_SSUBSAT in getRISCVVLOp()
7042 case ISD::SSUBSAT: in LowerOperation()
12559 case ISD::SSUBSAT: { in ReplaceNodeResults()
/freebsd/contrib/llvm-project/llvm/include/llvm/Target/
H A DTargetSelectionDAG.td454 def ssubsat : SDNode<"ISD::SSUBSAT" , SDTIntBinOp>;
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp516 setOperationAction({ISD::SADDSAT, ISD::SSUBSAT}, {MVT::i16, MVT::i32}, in SITargetLowering()
776 ISD::UADDSAT, ISD::USUBSAT, ISD::SADDSAT, ISD::SSUBSAT}, in SITargetLowering()
796 ISD::SSUBSAT}, in SITargetLowering()
5861 case ISD::SSUBSAT: in LowerOperation()
/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp538 ISD::SSUBO_CARRY, ISD::SSUBSAT, ISD::SUB, ISD::SUBC, in NVPTXTargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp1277 setOperationAction(ISD::SSUBSAT, VT, Legal); in AArch64TargetLowering()
1480 setOperationAction(ISD::SSUBSAT, VT, Legal); in AArch64TargetLowering()
21428 return DAG.getNode(ISD::SSUBSAT, SDLoc(N), N->getValueType(0), in performIntrinsicCombine()
21439 return DAG.getNode(ISD::SSUBSAT, SDLoc(N), N->getValueType(0), in performIntrinsicCombine()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp778 setOperationAction(ISD::SSUBSAT, VT, Legal); in PPCTargetLowering()