Home
last modified time | relevance | path

Searched refs:SSHLSAT (Results 1 – 14 of 14) sorted by relevance

/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h379 SSHLSAT, enumerator
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp378 case ISD::SSHLSAT: return "sshlsat"; in getOperationName()
H A DLegalizeVectorOps.cpp470 case ISD::SSHLSAT: in LegalizeOp()
1181 case ISD::SSHLSAT: in Expand()
H A DLegalizeIntegerTypes.cpp252 case ISD::SSHLSAT: in PromoteIntegerResult()
1115 bool IsShift = Opcode == ISD::USHLSAT || Opcode == ISD::SSHLSAT; in PromoteIntRes_ADDSUBSHLSAT()
1135 case ISD::SSHLSAT: in PromoteIntRes_ADDSUBSHLSAT()
3089 case ISD::SSHLSAT: in ExpandIntegerResult()
H A DLegalizeVectorTypes.cpp174 case ISD::SSHLSAT: in ScalarizeVectorResult()
1337 case ISD::SSHLSAT: in SplitVectorResult()
4767 case ISD::SSHLSAT: in WidenVectorResult()
H A DLegalizeDAG.cpp1184 case ISD::SSHLSAT: in LegalizeOp()
4039 case ISD::SSHLSAT: in ExpandNode()
H A DTargetLowering.cpp10970 bool IsSigned = Opcode == ISD::SSHLSAT; in expandShlSat()
10976 assert((Node->getOpcode() == ISD::SSHLSAT || in expandShlSat()
H A DSelectionDAGBuilder.cpp7256 setValue(&I, DAG.getNode(ISD::SSHLSAT, sdl, Op1.getValueType(), Op1, Op2)); in visitIntrinsicCall()
H A DSelectionDAG.cpp6688 case ISD::SSHLSAT: return C1.sshl_sat(C2); in FoldValue()
H A DDAGCombiner.cpp1950 case ISD::SSHLSAT: in visit()
11373 if (N->getOpcode() == ISD::SSHLSAT && N1C && in visitSHLSAT()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp803 ISD::SSHLSAT, ISD::USHLSAT, in initActions()
/freebsd/contrib/llvm-project/llvm/include/llvm/Target/
H A DTargetSelectionDAG.td472 def sshlsat : SDNode<"ISD::SSHLSAT" , SDTIntBinOp>;
/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp648 ISD::SREM, ISD::SRL, ISD::SSHLSAT, ISD::SSUBO, in NVPTXTargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp448 setOperationAction(ISD::SSHLSAT, MVT::i32, Legal); in RISCVTargetLowering()