| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 793 SRL_PARTS, enumerator
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 122 setOperationAction(ISD::SRL_PARTS, MVT::i32, Custom); in LanaiTargetLowering()
194 case ISD::SRL_PARTS: in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 113 setOperationAction(ISD::SRL_PARTS, MVT::i8, Expand); in MSP430TargetLowering()
114 setOperationAction(ISD::SRL_PARTS, MVT::i16, Expand); in MSP430TargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 355 case ISD::SRL_PARTS: return "srl_parts"; in getOperationName()
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| H A D | SelectionDAG.cpp | 3650 case ISD::SRL_PARTS: { in computeKnownBits()
10313 case ISD::SRL_PARTS: in getNode()
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| H A D | LegalizeDAG.cpp | 1280 case ISD::SRL_PARTS: in LegalizeOp()
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| H A D | LegalizeIntegerTypes.cpp | 4706 PartsOpc = ISD::SRL_PARTS; in ExpandIntRes_Shift()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFISelLowering.cpp | 113 setOperationAction(ISD::SRL_PARTS, VT, Expand); in BPFTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 153 setOperationAction({ISD::SHL_PARTS, ISD::SRL_PARTS, ISD::SRA_PARTS}, MVT::i32, in R600TargetLowering()
405 case ISD::SRL_PARTS: return LowerShiftParts(Op, DAG); in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYISelLowering.cpp | 65 setOperationAction(ISD::SRL_PARTS, MVT::i32, Expand); in CSKYTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 565 setOperationAction(ISD::SRL_PARTS, MVT::i32 , Custom); in NVPTXTargetLowering()
568 setOperationAction(ISD::SRL_PARTS, MVT::i64 , Custom); in NVPTXTargetLowering()
2432 assert(Op.getOpcode() == ISD::SRA_PARTS || Op.getOpcode() == ISD::SRL_PARTS); in LowerShiftRightParts()
2782 case ISD::SRL_PARTS: in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 103 for (auto OP : {ISD::SHL_PARTS, ISD::SRA_PARTS, ISD::SRL_PARTS}) in M68kTargetLowering()
1420 case ISD::SRL_PARTS: in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 392 setOperationAction(ISD::SRL_PARTS, MVT::i64, Custom); in MipsTargetLowering()
398 setOperationAction(ISD::SRL_PARTS, MVT::i32, Custom); in MipsTargetLowering()
1260 case ISD::SRL_PARTS: return lowerShiftRightParts(Op, DAG, false); in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 1829 setOperationAction(ISD::SRL_PARTS, MVT::i32, Expand); in SparcTargetLowering()
1863 setOperationAction(ISD::SRL_PARTS, MVT::i64, Expand); in SparcTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 102 setOperationAction(ISD::SRL_PARTS, MVT::i32, Expand); in XCoreTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 96 setOperationAction(ISD::SRL_PARTS, MVT::i16, Expand); in AVRTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 158 ISD::SRL_PARTS, ISD::ADDC, ISD::ADDE, ISD::SUBC, ISD::SUBE}) { in WebAssemblyTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 79 setOperationAction(ISD::SRL_PARTS, GRLenVT, Custom); in LoongArchTargetLowering()
400 case ISD::SRL_PARTS: in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 172 setOperationAction(ISD::SRL_PARTS, IntVT, Expand); in initSPUActions()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1602 ISD::SHL_PARTS, ISD::SRA_PARTS, ISD::SRL_PARTS, in HexagonTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 345 setOperationAction(ISD::SRL_PARTS, MVT::i64, Expand); in SystemZTargetLowering()
351 setOperationAction(ISD::SRL_PARTS, MVT::i128, Expand); in SystemZTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 1177 setOperationAction(ISD::SRL_PARTS, MVT::i32, Custom); in ARMTargetLowering()
1194 setOperationAction(ISD::SRL_PARTS, MVT::i32, Expand); in ARMTargetLowering()
6334 assert(Op.getOpcode() == ISD::SRA_PARTS || Op.getOpcode() == ISD::SRL_PARTS); in LowerShiftRightParts()
10608 case ISD::SRL_PARTS: in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 751 setOperationAction(ISD::SRL_PARTS, MVT::i64, Custom); in PPCTargetLowering()
756 setOperationAction(ISD::SRL_PARTS, MVT::i32, Custom); in PPCTargetLowering()
11846 case ISD::SRL_PARTS: return LowerSRL_PARTS(Op, DAG); in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 336 setOperationAction({ISD::SHL_PARTS, ISD::SRL_PARTS, ISD::SRA_PARTS}, XLenVT, in RISCVTargetLowering()
6281 case ISD::SRL_PARTS: in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 520 setOperationAction(ISD::SRL_PARTS, MVT::i64, Custom); in AArch64TargetLowering()
6885 case ISD::SRL_PARTS: in LowerOperation()
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