| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 792 SRA_PARTS, enumerator
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| /freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 115 setOperationAction(ISD::SRA_PARTS, MVT::i8, Expand); in MSP430TargetLowering()
116 setOperationAction(ISD::SRA_PARTS, MVT::i16, Expand); in MSP430TargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 354 case ISD::SRA_PARTS: return "sra_parts"; in getOperationName()
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| H A D | SelectionDAG.cpp | 3649 case ISD::SRA_PARTS: in computeKnownBits()
3665 else if (Opcode == ISD::SRA_PARTS) in computeKnownBits()
10312 case ISD::SRA_PARTS: in getNode()
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| H A D | LegalizeDAG.cpp | 1281 case ISD::SRA_PARTS: in LegalizeOp()
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| H A D | LegalizeIntegerTypes.cpp | 4709 PartsOpc = ISD::SRA_PARTS; in ExpandIntRes_Shift()
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| H A D | TargetLowering.cpp | 8125 bool IsSRA = Node->getOpcode() == ISD::SRA_PARTS; in expandShiftParts()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFISelLowering.cpp | 114 setOperationAction(ISD::SRA_PARTS, VT, Expand); in BPFTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 153 setOperationAction({ISD::SHL_PARTS, ISD::SRL_PARTS, ISD::SRA_PARTS}, MVT::i32, in R600TargetLowering()
404 case ISD::SRA_PARTS: in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 564 setOperationAction(ISD::SRA_PARTS, MVT::i32 , Custom); in NVPTXTargetLowering()
567 setOperationAction(ISD::SRA_PARTS, MVT::i64 , Custom); in NVPTXTargetLowering()
2432 assert(Op.getOpcode() == ISD::SRA_PARTS || Op.getOpcode() == ISD::SRL_PARTS); in LowerShiftRightParts()
2440 unsigned Opc = (Op.getOpcode() == ISD::SRA_PARTS) ? ISD::SRA : ISD::SRL; in LowerShiftRightParts()
2781 case ISD::SRA_PARTS: in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYISelLowering.cpp | 66 setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand); in CSKYTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 123 setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand); in LanaiTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 103 for (auto OP : {ISD::SHL_PARTS, ISD::SRA_PARTS, ISD::SRL_PARTS}) in M68kTargetLowering()
1418 case ISD::SRA_PARTS: in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 391 setOperationAction(ISD::SRA_PARTS, MVT::i64, Custom); in MipsTargetLowering()
397 setOperationAction(ISD::SRA_PARTS, MVT::i32, Custom); in MipsTargetLowering()
1259 case ISD::SRA_PARTS: return lowerShiftRightParts(Op, DAG, true); in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 1828 setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand); in SparcTargetLowering()
1862 setOperationAction(ISD::SRA_PARTS, MVT::i64, Expand); in SparcTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 101 setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand); in XCoreTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 95 setOperationAction(ISD::SRA_PARTS, MVT::i16, Expand); in AVRTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 157 ISD::SDIVREM, ISD::UDIVREM, ISD::SHL_PARTS, ISD::SRA_PARTS, in WebAssemblyTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 78 setOperationAction(ISD::SRA_PARTS, GRLenVT, Custom); in LoongArchTargetLowering()
398 case ISD::SRA_PARTS: in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 171 setOperationAction(ISD::SRA_PARTS, IntVT, Expand); in initSPUActions()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1602 ISD::SHL_PARTS, ISD::SRA_PARTS, ISD::SRL_PARTS, in HexagonTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 1176 setOperationAction(ISD::SRA_PARTS, MVT::i32, Custom); in ARMTargetLowering()
1193 setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand); in ARMTargetLowering()
6332 unsigned Opc = (Op.getOpcode() == ISD::SRA_PARTS) ? ISD::SRA : ISD::SRL; in LowerShiftRightParts()
6334 assert(Op.getOpcode() == ISD::SRA_PARTS || Op.getOpcode() == ISD::SRL_PARTS); in LowerShiftRightParts()
10609 case ISD::SRA_PARTS: return LowerShiftRightParts(Op, DAG); in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 347 setOperationAction(ISD::SRA_PARTS, MVT::i64, Expand); in SystemZTargetLowering()
353 setOperationAction(ISD::SRA_PARTS, MVT::i128, Expand); in SystemZTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 750 setOperationAction(ISD::SRA_PARTS, MVT::i64, Custom); in PPCTargetLowering()
755 setOperationAction(ISD::SRA_PARTS, MVT::i32, Custom); in PPCTargetLowering()
11847 case ISD::SRA_PARTS: return LowerSRA_PARTS(Op, DAG); in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 336 setOperationAction({ISD::SHL_PARTS, ISD::SRL_PARTS, ISD::SRA_PARTS}, XLenVT, in RISCVTargetLowering()
6279 case ISD::SRA_PARTS: in LowerOperation()
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