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/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/Disassembler/
H A DSparcDisassembler.cpp61 SP::G0, SP::G1, SP::G2, SP::G3,
62 SP::G4, SP::G5, SP::G6, SP::G7,
63 SP::O0, SP
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/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcInstrInfo.cpp43 : SparcGenInstrInfo(SP::ADJCALLSTACKDOWN, SP::ADJCALLSTACKUP), RI(), in SparcInstrInfo()
53 if (MI.getOpcode() == SP::LDri || MI.getOpcode() == SP::LDXri || in isLoadFromStackSlot()
54 MI.getOpcode() == SP::LDFri || MI.getOpcode() == SP::LDDFri || in isLoadFromStackSlot()
55 MI.getOpcode() == SP::LDQFri) { in isLoadFromStackSlot()
72 if (MI.getOpcode() == SP::STri || MI.getOpcode() == SP::STXri || in isStoreToStackSlot()
73 MI.getOpcode() == SP::STFri || MI.getOpcode() == SP::STDFri || in isStoreToStackSlot()
74 MI.getOpcode() == SP::STQFri) { in isStoreToStackSlot()
161 static bool isUncondBranchOpcode(int Opc) { return Opc == SP::BA; } in isUncondBranchOpcode()
164 return Opc == SP::BCOND || Opc == SP::BPICC || Opc == SP::BPICCA || in isI32CondBranchOpcode()
165 Opc == SP::BPICCNT || Opc == SP::BPICCANT; in isI32CondBranchOpcode()
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H A DSparcFrameLowering.cpp52 BuildMI(MBB, MBBI, dl, TII.get(ADDri), SP::O6) in emitSPAdjustment()
53 .addReg(SP::O6).addImm(NumBytes); in emitSPAdjustment()
64 BuildMI(MBB, MBBI, dl, TII.get(SP::SETHIi), SP::G1) in emitSPAdjustment()
66 BuildMI(MBB, MBBI, dl, TII.get(SP::ORri), SP::G1) in emitSPAdjustment()
67 .addReg(SP::G1).addImm(LO10(NumBytes)); in emitSPAdjustment()
68 BuildMI(MBB, MBBI, dl, TII.get(ADDrr), SP::O6) in emitSPAdjustment()
69 .addReg(SP::O6).addReg(SP::G1); in emitSPAdjustment()
77 BuildMI(MBB, MBBI, dl, TII.get(SP::SETHIi), SP::G1) in emitSPAdjustment()
79 BuildMI(MBB, MBBI, dl, TII.get(SP::XORri), SP::G1) in emitSPAdjustment()
80 .addReg(SP::G1).addImm(LOX10(NumBytes)); in emitSPAdjustment()
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H A DSparcRegisterInfo.cpp34 SparcRegisterInfo::SparcRegisterInfo() : SparcGenRegisterInfo(SP::O7) {}
56 Reserved.set(SP::G1); in getReservedRegs()
60 Reserved.set(SP::G2); in getReservedRegs()
61 Reserved.set(SP::G3); in getReservedRegs()
62 Reserved.set(SP::G4); in getReservedRegs()
66 Reserved.set(SP::G5); in getReservedRegs()
68 Reserved.set(SP::O6); in getReservedRegs()
69 Reserved.set(SP::I6); in getReservedRegs()
70 Reserved.set(SP::I7); in getReservedRegs()
71 Reserved.set(SP in getReservedRegs()
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H A DDelaySlotFiller.cpp116 (MI->getOpcode() == SP::RESTORErr in runOnMachineBasicBlock()
117 || MI->getOpcode() == SP::RESTOREri)) { in runOnMachineBasicBlock()
125 (MI->getOpcode() == SP::FCMPS || MI->getOpcode() == SP::FCMPD in runOnMachineBasicBlock()
126 || MI->getOpcode() == SP::FCMPQ)) { in runOnMachineBasicBlock()
127 BuildMI(MBB, I, MI->getDebugLoc(), TII->get(SP::NOP)); in runOnMachineBasicBlock()
145 BuildMI(MBB, I, MI->getDebugLoc(), TII->get(SP::NOP)); in runOnMachineBasicBlock()
155 TII->get(SP::UNIMP)).addImm(structSize); in runOnMachineBasicBlock()
179 if (Opc == SP::RET || Opc == SP::TLS_CALL) in findDelayInstr()
182 if (Opc == SP::RETL || Opc == SP::TAIL_CALL || Opc == SP::TAIL_CALLri) { in findDelayInstr()
186 if (J->getOpcode() == SP::RESTORErr in findDelayInstr()
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H A DSparcAsmPrinter.cpp110 CallInst.setOpcode(SP::CALL); in EmitCall()
118 RDPCInst.setOpcode(SP::RDASR); in EmitRDPC()
120 RDPCInst.addOperand(MCOperand::createReg(SP::ASR5)); in EmitRDPC()
129 SETHIInst.setOpcode(SP::SETHIi); in EmitSETHI()
150 EmitBinary(OutStreamer, SP::ORri, RS1, Imm, RD, STI); in EmitOR()
156 EmitBinary(OutStreamer, SP::ADDrr, RS1, RS2, RD, STI); in EmitADD()
162 EmitBinary(OutStreamer, SP::SLLri, RS1, Imm, RD, STI); in EmitSHL()
186 assert(MO.getReg() != SP::O7 && in LowerGETPCXAndEmitMCInsts()
222 MCOperand RegO7 = MCOperand::createReg(SP::O7); in LowerGETPCXAndEmitMCInsts()
236 MCOperand RegO7 = MCOperand::createReg(SP::O7); in LowerGETPCXAndEmitMCInsts()
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H A DLeonPasses.cpp52 if (Opcode >= SP::LDDArr && Opcode <= SP::LDrr) { in runOnMachineFunction()
54 BuildMI(MBB, NMBBI, DL, TII.get(SP::NOP)); in runOnMachineFunction()
87 if (Opcode == SP::CALL && MI.getNumOperands() > 0) { in runOnMachineFunction()
146 if (Opcode == SP::FSQRTD || Opcode == SP::FDIVD) { in runOnMachineFunction()
148 BuildMI(MBB, MBBI, DL, TII.get(SP::NOP)); in runOnMachineFunction()
152 BuildMI(MBB, NMBBI, DL, TII.get(SP::NOP)); in runOnMachineFunction()
H A DSparcISelLowering.cpp62 SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5 in CC_Sparc_Assign_Split_64()
88 SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5 in CC_Sparc_Assign_Ret_Split_64()
122 Reg = SP::I0 + Offset/8; in Analyze_CC_Sparc64_Full()
125 Reg = SP::D0 + Offset/8; in Analyze_CC_Sparc64_Full()
128 Reg = SP::F1 + Offset/4; in Analyze_CC_Sparc64_Full()
131 Reg = SP::Q0 + Offset/16; in Analyze_CC_Sparc64_Full()
165 State.addLoc(CCValAssign::getReg(ValNo, ValVT, SP::F0 + Offset/4, in Analyze_CC_Sparc64_Half()
172 unsigned Reg = SP::I0 + Offset/8; in Analyze_CC_Sparc64_Half()
228 static_assert(SP::I0 + 7 == SP::I7 && SP::O0 + 7 == SP::O7, in toCallerWindow()
230 if (Reg >= SP::I0 && Reg <= SP::I7) in toCallerWindow()
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H A DSparcISelDAGToDAG.cpp153 R2 = CurDAG->getRegister(SP::G0, TLI->getPointerTy(CurDAG->getDataLayout())); in SelectADDRrr()
227 if ((!IsTiedToChangedOp && (!HasRC || RC != SP::IntRegsRegClassID)) in tryInlineAsm()
243 Register GPVR = MRI.createVirtualRegister(&SP::IntPairRegClass); in tryInlineAsm()
252 SDValue Sub0 = CurDAG->getTargetExtractSubreg(SP::sub_even, dl, MVT::i32, in tryInlineAsm()
254 SDValue Sub1 = CurDAG->getTargetExtractSubreg(SP::sub_odd, dl, MVT::i32, in tryInlineAsm()
278 CurDAG->getTargetConstant(SP::IntPairRegClassID, dl, in tryInlineAsm()
281 CurDAG->getTargetConstant(SP::sub_even, dl, MVT::i32), in tryInlineAsm()
283 CurDAG->getTargetConstant(SP::sub_odd, dl, MVT::i32), in tryInlineAsm()
289 Register GPVR = MRI.createVirtualRegister(&SP::IntPairRegClass); in tryInlineAsm()
305 Flag.setRegClass(SP::IntPairRegClassID); in tryInlineAsm()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/MCTargetDesc/
H A DSparcInstPrinter.cpp29 using namespace SP;
64 case SP::JMPLrr: in printSparcAliasInstr()
65 case SP::JMPLri: { in printSparcAliasInstr()
72 case SP::G0: // jmp $addr | ret | retl in printSparcAliasInstr()
77 case SP::I7: O << "\tret"; return true; in printSparcAliasInstr()
78 case SP::O7: O << "\tretl"; return true; in printSparcAliasInstr()
83 case SP::O7: // call $addr in printSparcAliasInstr()
88 case SP::V9FCMPS: case SP::V9FCMPD: case SP::V9FCMPQ: in printSparcAliasInstr()
89 case SP::V9FCMPES: case SP::V9FCMPED: case SP::V9FCMPEQ: { in printSparcAliasInstr()
93 || (MI->getOperand(0).getReg() != SP::FCC0)) in printSparcAliasInstr()
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H A DSparcMCCodeEmitter.cpp104 case SP::TLS_CALL: SymOpNo = 1; break; in encodeInstruction()
105 case SP::GDOP_LDrr: in encodeInstruction()
106 case SP::GDOP_LDXrr: in encodeInstruction()
107 case SP::TLS_ADDrr: in encodeInstruction()
108 case SP::TLS_LDrr: in encodeInstruction()
109 case SP::TLS_LDXrr: SymOpNo = 3; break; in encodeInstruction()
186 if (MI.getOpcode() == SP::TLS_CALL) { in getCallTargetOpValue()
/freebsd/usr.bin/procstat/tests/
H A Dprocstat_test.sh30 SP='[[:space:]]'
56 line_format="$SP*%s$SP+%s$SP+%s$SP+%s$SP*"
80 line_format="$SP*%s$SP+%s$SP+%s$SP*"
105 line_format="$SP*%s$SP+%s$SP+%s$SP*"
127 line_format="$SP*%s$SP+%s$SP+%s$SP+%s$SP+%s$SP+%s$SP+%s$SP+%s$SP+%s$SP%s$SP*"
/freebsd/contrib/llvm-project/compiler-rt/lib/orc/tests/unit/
H A Dstring_pool_test.cpp17 StringPool SP; in TEST() local
18 auto P1 = SP.intern("hello"); in TEST()
22 auto P2 = SP.intern(S); in TEST()
24 auto P3 = SP.intern("goodbye"); in TEST()
36 StringPool SP; in TEST() local
37 auto Foo = SP.intern("foo"); in TEST()
42 StringPool SP; in TEST() local
44 auto P1 = SP.intern("s1"); in TEST()
45 SP.clearDeadEntries(); in TEST()
46 EXPECT_FALSE(SP.empty()) << "\"s1\" entry in pool should still be retained"; in TEST()
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/freebsd/crypto/heimdal/appl/ftp/ftpd/
H A Dftpcmd.y95 SP CRLF COMMA
140 : USER SP username CRLF check_secure
146 | PASS SP password CRLF check_secure
154 | PORT SP host_port CRLF check_secure
175 | EPRT SP STRING CRLF check_secure
191 | EPSV SP STRING CRLF check_login
197 | TYPE SP type_code CRLF check_secure
234 | STRU SP struct_code CRLF check_secure
248 | MODE SP mode_code CRLF check_secure
262 | ALLO SP NUMBER CRLF check_secure
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/freebsd/libexec/ftpd/
H A Dftpcmd.y92 SP CRLF COMMA
133 : USER SP username CRLF
138 | PASS SP password CRLF
147 | PORT check_login SP host_port CRLF
170 | LPRT check_login SP host_long_port CRLF
192 | EPRT check_login SP STRING CRLF
307 | EPSV check_login_epsv SP NUMBER CRLF
327 | EPSV check_login_epsv SP ALL CRLF
339 | TYPE check_login SP type_code CRLF
376 | STRU check_login SP struct_code CRLF
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DJMCInstrumenter.cpp72 std::string getFlagName(DISubprogram &SP, bool UseX86FastCall) { in getFlagName() argument
79 has_root_name(SP.getDirectory(), sys::path::Style::windows_backslash) || in getFlagName()
80 SP.getDirectory().contains("\\") || in getFlagName()
81 SP.getFilename().contains("\\") in getFlagName()
89 SmallString<256> FilePath(SP.getDirectory()); in getFlagName()
90 sys::path::append(FilePath, PathStyle, SP.getFilename()); in getFlagName()
111 void attachDebugInfo(GlobalVariable &GV, DISubprogram &SP) { in attachDebugInfo() argument
113 DICompileUnit *CU = SP.getUnit(); in attachDebugInfo()
122 CU, GV.getName(), /*LinkageName=*/StringRef(), SP.getFile(), in attachDebugInfo()
168 auto *SP = F.getSubprogram(); in runImpl() local
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/freebsd/crypto/openssl/crypto/sha/asm/
H A Dkeccak1600-c64x.pl106 || STDW B3:B2,*SP[4]
147 || STDW A$A[3][0]:A$A[4][0],*SP[1] ; offload some data
148 STDW B$A[3][0]:B$A[4][0],*SP[2]
206 || LDDW *SP[2],B$A[3][0]:B$A[4][0]
375 ||[!A0] LDDW *SP[4], RA:B2
407 STW FP,*SP--(80) ; save frame pointer
409 STDW B13:B12,*SP[9]
411 STDW B11:B10,*SP[8]
413 STW RA, *SP[15]
523 LDW *SP[15],RA
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCFrameLowering.cpp109 ScalarAlloc, ARC::SP); in adjustStackToMatchRecords()
141 BuildMI(MBB, MBBI, dl, TII->get(Opc), ARC::SP) in emitPrologue()
142 .addReg(ARC::SP) in emitPrologue()
148 .addReg(ARC::SP, RegState::Define) in emitPrologue()
150 .addReg(ARC::SP) in emitPrologue()
160 .addReg(ARC::SP) in emitPrologue()
161 .addReg(ARC::SP) in emitPrologue()
181 -(MFI.getStackSize() - AlreadyAdjusted), ARC::SP); in emitPrologue()
189 .addReg(ARC::SP) in emitPrologue()
256 BuildMI(MBB, MBBI, DebugLoc(), TII->get(Opc), ARC::SP) in emitEpilogue()
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/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430FrameLowering.cpp129 .addReg(MSP430::SP) in emitPrologue()
174 BuildMI(MBB, MBBI, DL, TII.get(MSP430::SUB16ri), MSP430::SP) in emitPrologue()
175 .addReg(MSP430::SP) in emitPrologue()
225 unsigned DwarfStackPtr = TRI->getDwarfRegNum(MSP430::SP, true); in emitEpilogue()
262 BuildMI(MBB, MBBI, DL, TII.get(MSP430::MOV16rr), MSP430::SP) in emitEpilogue()
267 BuildMI(MBB, MBBI, DL, TII.get(MSP430::SUB16ri), MSP430::SP) in emitEpilogue()
268 .addReg(MSP430::SP) in emitEpilogue()
278 BuildMI(MBB, MBBI, DL, TII.get(MSP430::ADD16ri), MSP430::SP) in emitEpilogue()
279 .addReg(MSP430::SP) in emitEpilogue()
380 BuildMI(MF, Old.getDebugLoc(), TII.get(MSP430::SUB16ri), MSP430::SP) in eliminateCallFramePseudoInstr()
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/freebsd/contrib/ntp/scripts/stats/
H A DREADME.timecodes19 <SP> ASCII space (hex 20)
29 In the following uppercase letters, punctuation marks and spaces <SP>
31 Special characters other than <LF>, <CR> and <SP> are preceded by ^.
39 i = synchronization flag (<SP> = in synch, ? = out synch)
44 Note: alarm condition is indicated by other than <SP> at A, which
57 i = synchronization flag (<SP> = in synch, ? = out synch)
58 q = quality indicator (<SP> < 1ms, A < 10 ms, B < 100 ms, C < 500
64 d = standard/daylight time indicator (<SP> standard, D daylight)
66 Note: alarm condition is indicated by other than <SP> at A, which
69 other than <SP> at Q, with time since last lock indicated by the
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/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaFrameLowering.cpp42 MCRegister SP = Xtensa::SP; in emitPrologue() local
58 TII.adjustStackPtr(SP, -StackSize, MBB, MBBI); in emitPrologue()
113 .addReg(SP) in emitPrologue()
114 .addReg(SP) in emitPrologue()
143 MCRegister SP = Xtensa::SP; in emitEpilogue() local
180 BuildMI(MBB, I, DL, TII.get(Xtensa::OR), SP).addReg(FP).addReg(FP); in emitEpilogue()
190 TII.adjustStackPtr(SP, StackSize, MBB, MBBI); in emitEpilogue()
240 TII.adjustStackPtr(Xtensa::SP, Amount, MBB, I); in eliminateCallFramePseudoInstr()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DEntryExitInstrumenter.cpp108 if (auto SP = F.getSubprogram()) in runOnFunction() local
109 DL = DILocation::get(SP->getContext(), SP->getScopeLine(), 0, SP); in runOnFunction()
129 else if (auto SP = F.getSubprogram()) in runOnFunction() local
130 DL = DILocation::get(SP->getContext(), 0, 0, SP); in runOnFunction()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/
H A DDwarfUnit.cpp430 void DwarfUnit::addSourceLine(DIE &Die, const DISubprogram *SP) { in addSourceLine() argument
431 assert(SP); in addSourceLine()
433 addSourceLine(Die, SP->getLine(), SP->getFile()); in addSourceLine()
553 if (auto *SP = dyn_cast<DISubprogram>(Context)) in getOrCreateContextDIE() local
554 return getOrCreateSubprogramDIE(SP); in getOrCreateContextDIE()
950 if (auto *SP = dyn_cast<DISubprogram>(Element)) in constructTypeDIE() local
951 getOrCreateSubprogramDIE(SP); in constructTypeDIE()
1187 DIE *DwarfUnit::getOrCreateSubprogramDIE(const DISubprogram *SP, bool Minimal) { in getOrCreateSubprogramDIE() argument
1192 Minimal ? &getUnitDie() : getOrCreateContextDIE(SP->getScope()); in getOrCreateSubprogramDIE()
1194 if (DIE *SPDie = getDIE(SP)) in getOrCreateSubprogramDIE()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMips16InstrInfo.h74 void makeFrame(unsigned SP, int64_t FrameSize, MachineBasicBlock &MBB,
78 void restoreFrame(unsigned SP, int64_t FrameSize, MachineBasicBlock &MBB,
82 void adjustStackPtr(unsigned SP, int64_t Amount, MachineBasicBlock &MBB,
119 void adjustStackPtrBig(unsigned SP, int64_t Amount, MachineBasicBlock &MBB,
124 void adjustStackPtrBigUnrestricted(unsigned SP, int64_t Amount,
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/AsmParser/
H A DSparcAsmParser.cpp49 using namespace SP;
686 TmpInst.setOpcode(SP::SETHIi); in expandSET()
711 TmpInst.setOpcode(SP::ORri); in expandSET()
738 Instructions.push_back(MCInstBuilder(SP::ORri) in expandSETX()
749 MCInstBuilder(SP::SETHIi) in expandSETX()
754 MCInstBuilder(SP::ORri) in expandSETX()
769 MCInstBuilder(SP::SETHIi) in expandSETX()
774 MCInstBuilder(SP::ORri) in expandSETX()
779 Instructions.push_back(MCInstBuilder(SP::SLLXri) in expandSETX()
784 Instructions.push_back(MCInstBuilder(SP::ORrr) in expandSETX()
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