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Searched refs:SLL (Results 1 – 25 of 50) sorted by relevance

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/freebsd/crypto/openssl/crypto/sha/asm/
H A Dsha512-mips.pl102 $SLL="dsll"; # shift left logical
117 $SLL="sll"; # shift left logical
218 $SLL $tmp1,$e,`$SZ*8-@Sigma1[2]`
222 $SLL $tmp1,$e,`$SZ*8-@Sigma1[1]`
226 $SLL $tmp1,$e,`$SZ*8-@Sigma1[0]`
234 $SLL $tmp1,$a,`$SZ*8-@Sigma0[2]`
238 $SLL $tmp1,$a,`$SZ*8-@Sigma0[1]`
242 $SLL $tmp1,$a,`$SZ*8-@Sigma0[0]`
282 $SLL $tmp1,@X[1],`$SZ*8-@sigma0[2]`
285 $SLL $tmp1,`@sigma0[2]-@sigma0[1]`
[all …]
H A Dsha512-sparcv9.pl69 $SLL="sllx"; # shift left logical
95 $SLL="sll"; # shift left logical
236 $SLL $e,`$SZ*8-@Sigma1[2]`,$tmp1
240 $SLL $e,`$SZ*8-@Sigma1[1]`,$tmp1
244 $SLL $e,`$SZ*8-@Sigma1[0]`,$tmp1
252 $SLL $a,`$SZ*8-@Sigma0[2]`,$tmp1
256 $SLL $a,`$SZ*8-@Sigma0[1]`,$tmp1
260 $SLL $a,`$SZ*8-@Sigma0[0]`,$tmp1
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsAnalyzeImmediate.cpp48 AddInstr(SeqLs, Inst(SLL, Shamt)); in GetInstSeqLsSLL()
93 (Seq[1].Opc != SLL) || (Seq[1].ImmOpnd < 16)) in ReplaceADDiuSLLWithLUi()
136 SLL = Mips::SLL; in Analyze()
141 SLL = Mips::DSLL; in Analyze()
H A DMipsAnalyzeImmediate.h60 unsigned ADDiu, ORi, SLL, LUi; variable
H A DMipsInstructionSelector.cpp368 MachineInstr *SLL = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::SLL)) in select() local
372 if (!constrainSelectedInstRegOperands(*SLL, TII, TRI, RBI)) in select()
H A DMipsExpandPseudo.cpp183 BuildMI(sinkMBB, DL, TII->get(Mips::SLL), Dest) in expandAtomicCmpSwapSubword()
492 BuildMI(loopMBB, DL, TII->get(Mips::SLL), StoreVal) in expandAtomicBinOpSubword()
593 BuildMI(sinkMBB, DL, TII->get(Mips::SLL), Dest) in expandAtomicBinOpSubword()
H A DMipsFastISel.cpp1609 emitInst(Mips::SLL, TempReg[0]).addReg(SrcReg).addImm(8); in fastLowerIntrinsicCall()
1637 emitInst(Mips::SLL, TempReg[5]).addReg(TempReg[4]).addImm(8); in fastLowerIntrinsicCall()
1639 emitInst(Mips::SLL, TempReg[6]).addReg(SrcReg).addImm(24); in fastLowerIntrinsicCall()
1837 emitInst(Mips::SLL, TempReg).addReg(SrcReg).addImm(ShiftAmt); in emitIntSExt32r1()
1990 Opcode = Mips::SLL; in selectShift()
H A DMipsScheduleP5600.td225 SEB, SEH, SLT, SLTu, SLL, SRA, SRL, XORi,
441 def : InstRW<[P5600WriteMSAShortLogic], (instregex "^(SLL|SLLI)_[BHWD]$")>;
H A DMipsISelLowering.cpp1668 BuildMI(BB, DL, TII->get(Mips::SLL), ScrReg).addReg(SrcReg).addImm(ShiftImm); in emitSignExtendToI32InReg()
1816 BuildMI(BB, DL, TII->get(Mips::SLL), ShiftAmt).addReg(PtrLSB2).addImm(3); in emitAtomicBinaryPartword()
1821 BuildMI(BB, DL, TII->get(Mips::SLL), ShiftAmt).addReg(Off).addImm(3); in emitAtomicBinaryPartword()
2003 BuildMI(BB, DL, TII->get(Mips::SLL), ShiftAmt).addReg(PtrLSB2).addImm(3); in emitAtomicCmpSwapPartword()
2008 BuildMI(BB, DL, TII->get(Mips::SLL), ShiftAmt).addReg(Off).addImm(3); in emitAtomicCmpSwapPartword()
2762 SDValue SLL = DAG.getNode(ISD::SHL, DL, MVT::i64, LWR, Const32); in lowerLOAD() local
2763 SDValue SRL = DAG.getNode(ISD::SRL, DL, MVT::i64, SLL, Const32); in lowerLOAD()
H A DMipsInstrInfo.cpp72 Subtarget.inMicroMipsMode() ? MMOpc : (unsigned)Mips::SLL; in insertNop()
H A DMipsAsmPrinter.cpp1186 EmitToStreamer(*OutStreamer, MCInstBuilder(Mips::SLL) in EmitSled()
/freebsd/crypto/openssl/crypto/bn/asm/
H A Dmips.pl70 $SLL="dsll";
85 $SLL="sll";
921 $SLL $a2,1
928 $SLL $t2,$t1
936 $SLL $a0,$t9
937 $SLL $a1,$t9
961 $SLL $t3,$a0,4*$BNSZ # bits
982 $SLL $a1,4*$BNSZ # bits
984 $SLL $v0,$QT,4*$BNSZ # bits
994 $SLL $t3,$a0,4*$BNSZ # bits
[all …]
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dfsl,imx6sll-pinctrl.txt1 * Freescale i.MX6 SLL IOMUX Controller
/freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/RISCV/
H A DRISCVInstructions.h129 R_TYPE_INST(SLL);
277 SLTIU, XORI, ORI, ANDI, ADD, SUB, SLL, SLT, SLTU, XOR, SRL, SRA, OR, AND,
H A DEmulateInstructionRISCV.cpp448 {"SLL", 0xFE00707F, 0x1033, DecodeRType<SLL>},
802 bool operator()(SLL inst) { in operator ()()
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZShortenInst.cpp367 if (TwoOperandOpcode == SystemZ::SLL || in processBlock()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/
H A DRISCVInstructionSelector.cpp646 auto SLL = in select() local
649 if (!SLL.constrainAllUses(TII, TRI, RBI)) in select()
654 {MI.getOperand(0), SLL.getReg(0)}); in select()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsTargetStreamer.cpp287 unsigned Opc = Mips::SLL; in emitEmptyDelaySlot()
304 emitRRI(Mips::SLL, Mips::ZERO, Mips::ZERO, 0, IDLoc, STI); in emitNop()
H A DMipsMCCodeEmitter.cpp166 // Unfortunately in MIPS both NOP and SLL will come in with Binary == 0 in encodeInstruction()
169 if ((Opcode != Mips::NOP) && (Opcode != Mips::SLL) && in encodeInstruction()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVOptWInstrs.cpp238 case RISCV::SLL: in hasAllNBitUsers()
H A DRISCVExpandAtomicPseudoInsts.cpp430 BuildMI(MBB, DL, TII->get(RISCV::SLL), ValReg) in expandAtomicMinMaxOp()
H A DRISCVExpandPseudoInsts.cpp211 case RISCV::PseudoCCSLL: NewOpc = RISCV::SLL; break; in expandCCOp()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ScheduleZnver4.td1581 "(V?)P(SLL|SRL|SRA)(D|Q|W|DQ)(Y?|Z?|Z128?|Z256?)(rr|rrk|rrkz)",
1582 "(V?)P(SLL|SRL|SRA)DQYri",
1583 "(V?)P(SLL|SRL)DQ(Z?|Z256?)ri",
1597 "VP(SLL|SRL|SRA)(D|Q|W)(Z|Z128|Z256?)(ri|rik|rikz)"
/freebsd/usr.bin/units/
H A Ddefinitions.units493 SLL sierraleoneleone
/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaInstrInfo.td107 def SLL : RRR_Inst<0x00, 0x01, 0x0A, (outs AR:$r), (ins AR:$s),

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