| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | GCNCreateVOPD.cpp | 57 bool doReplace(const SIInstrInfo *SII, VOPDCombineInfo &CI) { in doReplace() argument
63 AMDGPU::getVOPDEncodingFamily(SII->getSubtarget()); in doReplace()
71 FirstMI->getDebugLoc(), SII->get(NewOpcode)) in doReplace()
96 bool IsVOP3 = SII->isVOP3(*MI[CompIdx]); in doReplace()
100 SII->getNamedOperand(*MI[CompIdx], SrcMods[CompSrcIdx]); in doReplace()
116 SII->fixImplicitOperands(*VOPDInst); in doReplace()
136 const SIInstrInfo *SII = ST->getInstrInfo(); in run() local
171 return llvm::checkVOPDRegConstraints(*SII, *FirstMI, *SecondMI, in run()
182 Changed |= doReplace(SII, CI); in run()
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| H A D | SIInsertHardClauses.cpp | 178 bool emitClause(const ClauseInfo &CI, const SIInstrInfo *SII) { in emitClause() argument
186 BuildMI(MBB, *CI.First, DebugLoc(), SII->get(AMDGPU::S_CLAUSE)) in emitClause()
206 const SIInstrInfo *SII = ST->getInstrInfo(); in run() local
220 if (!SII->getMemOperandsWithOffsetWidth(MI, BaseOps, Dummy1, Dummy2, in run()
239 !SII->shouldClusterMemOps(CI.BaseOps, 0, false, BaseOps, 0, false, in run()
242 Changed |= emitClause(CI, SII); in run()
267 Changed |= emitClause(CI, SII); in run()
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| H A D | AMDGPUMarkLastScratchLoad.cpp | 33 const SIInstrInfo *SII = nullptr; member in __anonbeb091f80111::AMDGPUMarkLastScratchLoad
92 SII = ST.getInstrInfo(); in run()
137 if (SII->isLoadFromStackSlot(*MI, LoadFI) && LoadFI == FrameIndex) { in run()
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| H A D | AMDGPUInsertDelayAlu.cpp | 28 const SIInstrInfo *SII; member in __anon39c000570111::AMDGPUInsertDelayAlu
340 BuildMI(MBB, MI, DebugLoc(), SII->get(AMDGPU::S_DELAY_ALU)).addImm(Imm); in emitDelayAlu()
406 if (SII->isVALU(MI.getOpcode())) { in runOnMachineBasicBlock()
463 SII = ST.getInstrInfo(); in run()
465 SchedModel = &SII->getSchedModel(); in run()
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| H A D | GCNRegPressure.h | 447 auto &SII = *LIS.getSlotIndexes(); in getLiveRegMap() local
449 auto SI = SII.getInstructionIndex(*I); in getLiveRegMap()
467 LiveRegMap[SII.getInstructionFromIndex(SI)][Reg] = in getLiveRegMap()
475 LiveRegMap[SII.getInstructionFromIndex(SI)][Reg] |= S.LaneMask; in getLiveRegMap()
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| H A D | GCNIterativeScheduler.cpp | 124 const SIInstrInfo *SII = static_cast<const SIInstrInfo *>(TII); in swapIGLPMutations() local
126 if (SII->isIGLPMutationOnly(I->getOpcode())) { in swapIGLPMutations()
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| H A D | GCNSchedStrategy.cpp | 1178 const SIInstrInfo *SII = static_cast<const SIInstrInfo *>(DAG.TII); in initGCNRegion() local
1181 if (SII->isIGLPMutationOnly(I.getOpcode())) in initGCNRegion()
2126 const SIInstrInfo *SII = static_cast<const SIInstrInfo *>(DAG->TII); in hasIGLPInstrs() local
2127 return any_of(*DAG, [SII](MachineBasicBlock::iterator MI) { in hasIGLPInstrs()
2128 return SII->isIGLPMutationOnly(MI->getOpcode()); in hasIGLPInstrs()
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| H A D | AMDGPUISelDAGToDAG.cpp | 3917 const SIInstrInfo *SII = Subtarget->getInstrInfo(); in isVGPRImm() local
3937 const MCInstrDesc &Desc = SII->get(Opc); in isVGPRImm()
3941 if (SII->findCommutedOpIndices(Desc, OpIdx, CommuteIdx1)) { in isVGPRImm()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCExpandPseudos.cpp | 63 MachineBasicBlock::iterator SII) { in expandStore() argument
64 MachineInstr &SI = *SII; in expandStore()
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| /freebsd/sys/dev/sound/pci/hda/ |
| H A D | hdac.h | 779 #define HDA_CODEC_SII1390 HDA_CODEC_CONSTRUCT(SII, 0x1390)
780 #define HDA_CODEC_SII1392 HDA_CODEC_CONSTRUCT(SII, 0x1392)
781 #define HDA_CODEC_SIIXXXX HDA_CODEC_CONSTRUCT(SII, 0xffff)
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| /freebsd/crypto/krb5/src/lib/krb5/unicode/ |
| H A D | UnicodeData.txt | 3907 14F0;CANADIAN SYLLABICS SII;Lo;0;L;;;;;N;;;;;
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| /freebsd/crypto/heimdal/lib/wind/ |
| H A D | UnicodeData.txt | 3992 14F0;CANADIAN SYLLABICS SII;Lo;0;L;;;;;N;;;;;
|