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Searched refs:SEXTLOAD (Results 1 – 25 of 47) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp820 case ISD::SEXTLOAD: OS << ", sext"; break; in print_details()
852 case ISD::SEXTLOAD: OS << ", sext"; break; in print_details()
889 case ISD::SEXTLOAD: OS << ", sext"; break; in print_details()
921 case ISD::SEXTLOAD: OS << ", sext"; break; in print_details()
H A DDAGCombiner.cpp13268 auto LoadExtOpcode = IsSigned ? ISD::SEXTLOAD : ISD::ZEXTLOAD; in visitVSELECT()
13671 if ((LoadExt == ISD::SEXTLOAD && ExtOpcode != ISD::SIGN_EXTEND) || in isCompatibleLoad()
13705 ExtLoadOpcode = ISD::SEXTLOAD; in tryToFoldExtendSelectLoad()
13933 N->getOpcode() == ISD::SIGN_EXTEND ? ISD::SEXTLOAD : ISD::ZEXTLOAD; in CombineExtLoad()
14018 Load->getExtensionType() == ISD::SEXTLOAD || Load->isIndexed()) in CombineZExtLogicopShiftLoad()
14117 bool isAExtLoad = (ExtLoadType == ISD::SEXTLOAD) ? ISD::isSEXTLoad(N0Node) in tryToFoldExtOfExtload()
14161 ExtLoadType = ISD::SEXTLOAD; in tryToFoldExtOfLoad()
14246 if ((ALoadExtTy == ISD::ZEXTLOAD && ExtLoadType == ISD::SEXTLOAD) || in tryToFoldExtOfAtomicLoad()
14247 (ALoadExtTy == ISD::SEXTLOAD && ExtLoadType == ISD::ZEXTLOAD)) in tryToFoldExtOfAtomicLoad()
14346 unsigned LoadOpcode = IsSignedCmp ? ISD::SEXTLOAD : ISD::ZEXTLOAD; in foldSextSetcc()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp151 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in BPFTargetLowering()
154 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Expand); in BPFTargetLowering()
155 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i16, Expand); in BPFTargetLowering()
156 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i32, Expand); in BPFTargetLowering()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h1665 enum LoadExtType { NON_EXTLOAD = 0, EXTLOAD, SEXTLOAD, ZEXTLOAD }; enumerator
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600ISelLowering.cpp49 for (auto Op : {ISD::SEXTLOAD, ISD::ZEXTLOAD, ISD::EXTLOAD}) in R600TargetLowering()
57 setLoadExtAction({ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD}, MVT::v2i32, in R600TargetLowering()
60 setLoadExtAction({ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD}, MVT::v4i32, in R600TargetLowering()
1306 if (ExtType == ISD::SEXTLOAD) { // ... ones. in lowerPrivateExtLoad()
1383 if (LoadNode->getExtensionType() == ISD::SEXTLOAD) { in LowerLOAD()
1503 Ext = ISD::SEXTLOAD; in LowerFormalArguments()
H A DAMDGPUISelDAGToDAG.cpp242 LoadOp = LdHi->getExtensionType() == ISD::SEXTLOAD ? in matchLoadD16FromBuildVector()
270 LoadOp = LdLo->getExtensionType() == ISD::SEXTLOAD ? in matchLoadD16FromBuildVector()
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYISelLowering.cpp82 setLoadExtAction(ISD::SEXTLOAD, MVT::i32, MVT::i1, Promote); in CSKYTargetLowering()
96 setLoadExtAction(ISD::SEXTLOAD, MVT::i32, MVT::i8, Expand); in CSKYTargetLowering()
97 setLoadExtAction(ISD::SEXTLOAD, MVT::i32, MVT::i16, Expand); in CSKYTargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp65 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in MSP430TargetLowering()
67 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Expand); in MSP430TargetLowering()
68 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i16, Expand); in MSP430TargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelDAGToDAG.cpp1040 (PlainLoad && (PlainLoad->getExtensionType() == ISD::SEXTLOAD)) in tryLoad()
1120 const unsigned FromType = (ExtensionType == ISD::SEXTLOAD) in tryLoadVector()
1190 const unsigned FromType = (ExtensionType == ISD::SEXTLOAD) in tryLDG()
H A DNVPTXISelLowering.cpp740 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in NVPTXTargetLowering()
752 setLoadExtAction({ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD}, MVT::v2i16, in NVPTXTargetLowering()
5297 if (ExtType == ISD::SEXTLOAD) { in PerformANDCombine()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp1686 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i32, Expand); in HexagonTargetLowering()
1750 setLoadExtAction(ISD::SEXTLOAD, TargetVT, VT, Expand); in HexagonTargetLowering()
1772 setLoadExtAction(ISD::SEXTLOAD, MVT::v2i16, MVT::v2i8, Legal); in HexagonTargetLowering()
1775 setLoadExtAction(ISD::SEXTLOAD, MVT::v4i16, MVT::v4i8, Legal); in HexagonTargetLowering()
3150 if (ET == ISD::SEXTLOAD) { in LowerLoad()
H A DHexagonISelDAGToDAG.cpp148 if (ExtType == ISD::SEXTLOAD) in INITIALIZE_PASS()
303 IntExt = ISD::SEXTLOAD; in tryLoadOfLoadIntrinsic()
1627 if (L->getExtensionType() != ISD::SEXTLOAD) in DetectUseSxtw()
/freebsd/contrib/llvm-project/llvm/include/llvm/Target/
H A DTargetSelectionDAG.td1003 // cast<LoadSDNode>(N)->getExtensionType() == ISD::SEXTLOAD;
2078 return MGN->getExtensionType() == ISD::SEXTLOAD &&
2085 return MGN->getExtensionType() == ISD::SEXTLOAD &&
2092 return MGN->getExtensionType() == ISD::SEXTLOAD &&
/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaISelLowering.cpp96 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in XtensaTargetLowering()
99 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Expand); in XtensaTargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZOperators.td599 return getLoadExtType(N) == ISD::SEXTLOAD;
638 return ETy == ISD::EXTLOAD || ETy == ISD::SEXTLOAD;
H A DSystemZISelLowering.cpp327 setAtomicLoadExtAction({ISD::SEXTLOAD, ISD::ZEXTLOAD}, MVT::i64, in SystemZTargetLowering()
329 setAtomicLoadExtAction({ISD::SEXTLOAD, ISD::ZEXTLOAD}, MVT::i32, in SystemZTargetLowering()
331 setAtomicLoadExtAction({ISD::SEXTLOAD, ISD::ZEXTLOAD}, MVT::i16, in SystemZTargetLowering()
385 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in SystemZTargetLowering()
420 setLoadExtAction(ISD::SEXTLOAD, VT, InnerVT, Expand); in SystemZTargetLowering()
2860 if (Load->getExtensionType() == ISD::SEXTLOAD) { in adjustSubwordCmp()
2893 ISD::SEXTLOAD : in adjustSubwordCmp()
2923 case ISD::SEXTLOAD: in isNaturalMemoryOperand()
3076 (Type == ISD::SEXTLOAD && C.ICmpType != SystemZICMP::UnsignedOnly)) { in adjustICmpTruncate()
/freebsd/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp97 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in XCoreTargetLowering()
99 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Expand); in XCoreTargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp1613 Opcode = (LD->getExtensionType() == ISD::SEXTLOAD) in tryARMIndexedLoad()
1617 if (LD->getExtensionType() == ISD::SEXTLOAD) { in tryARMIndexedLoad()
1699 bool isSExtLd = LD->getExtensionType() == ISD::SEXTLOAD; in tryT2IndexedLoad()
1764 isSExtLd = LD->getExtensionType() == ISD::SEXTLOAD; in tryMVEIndexedLoad()
1780 isSExtLd = LD->getExtensionType() == ISD::SEXTLOAD; in tryMVEIndexedLoad()
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp353 for (auto Ext : {ISD::EXTLOAD, ISD::ZEXTLOAD, ISD::SEXTLOAD}) in WebAssemblyTargetLowering()
361 for (auto Ext : {ISD::EXTLOAD, ISD::ZEXTLOAD, ISD::SEXTLOAD}) in WebAssemblyTargetLowering()
367 for (auto Ext : {ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD}) { in WebAssemblyTargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp313 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in MipsTargetLowering()
512 setLoadExtAction(ISD::SEXTLOAD, MVT::i64, MVT::i32, Legal); in MipsTargetLowering()
517 setLoadExtAction(ISD::SEXTLOAD, MVT::i64, MVT::i32, Custom); in MipsTargetLowering()
2899 if ((VT == MVT::i32) || (ExtType == ISD::SEXTLOAD) || in lowerLOAD()
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp1607 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i32, Expand); in SparcTargetLowering()
1611 setLoadExtAction(ISD::SEXTLOAD, MVT::v2i32, VT, Expand); in SparcTargetLowering()
1642 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in SparcTargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp832 bool isSExt = LD->getExtensionType() == ISD::SEXTLOAD; in tryTLSXFormLoad()
3160 if (InputLoad && InputLoad->getExtensionType() == ISD::SEXTLOAD) in signExtendInputIfNeeded()
3199 if (InputLoad && InputLoad->getExtensionType() != ISD::SEXTLOAD) in zeroExtendInputIfNeeded()
5583 bool isSExt = LD->getExtensionType() == ISD::SEXTLOAD; in Select()
5620 bool isSExt = LD->getExtensionType() == ISD::SEXTLOAD; in Select()
/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp136 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in LanaiTargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.cpp76 setLoadExtAction({ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD}, GRLenVT, in LoongArchTargetLowering()
272 setLoadExtAction(ISD::SEXTLOAD, VT, InnerVT, Expand); in LoongArchTargetLowering()
4961 ExtType = ISD::SEXTLOAD; in checkValueWidth()
5096 ((ExtType2 != ISD::SEXTLOAD) && (ExtType1 != ISD::SEXTLOAD))) in performSETCCCombine()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp742 setAtomicLoadExtAction({ISD::SEXTLOAD, ISD::ZEXTLOAD}, ValVT, MemVT, in initActions()

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