/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
H A D | LoongArchFloat32InstrInfo.td | 189 // SETOLT/SETOLE/SETULT/SETULE/SETLE/SETEQ/SETLT. 193 def : PatFPSetcc<SETOLE, FCMP_CLE_S, FPR32>; 214 defm : PatFPBrcond<SETOLE, FCMP_CLE_S, FPR32>; 231 def : PatStrictFsetccs<SETOLE, FCMP_SLE_S, FPR32>; 254 def : PatFPSelectcc<SETOLE, FCMP_CLE_S, FSEL_xS, FPR32>;
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H A D | LoongArchFloat64InstrInfo.td | 169 // SETOLT/SETOLE/SETULT/SETULE/SETLE/SETEQ/SETLT. 173 def : PatFPSetcc<SETOLE, FCMP_CLE_D, FPR64>; 186 defm : PatFPBrcond<SETOLE, FCMP_CLE_D, FPR64>; 200 def : PatStrictFsetccs<SETOLE, FCMP_SLE_D, FPR64>; 219 def : PatFPSelectcc<SETOLE, FCMP_CLE_D, FSEL_xD, FPR64>;
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVInstrInfoZfa.td | 210 def: PatSetCC<FPR32, strict_fsetcc, SETOLE, FLEQ_S, f32>; 233 def: PatSetCC<FPR64, strict_fsetcc, SETOLE, FLEQ_D, f64>; 261 def: PatSetCC<FPR16, strict_fsetcc, SETOLE, FLEQ_H, f16>;
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H A D | RISCVInstrInfoD.td | 407 defm : PatSetCC_m<strict_fsetcc, SETOLE, PseudoQuietFLE_D, Ext>; 427 def : PatSetCC<FPR64, any_fsetccs, SETOLE, FLE_D, f64>; 447 def : PatSetCC<FPR64INX, any_fsetccs, SETOLE, FLE_D_INX, f64>; 467 def : PatSetCC<FPR64IN32X, any_fsetccs, SETOLE, FLE_D_IN32X, f64>;
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H A D | RISCVInstrInfoZfh.td | 363 defm : PatSetCC_m<strict_fsetcc, SETOLE, PseudoQuietFLE_H, Ext>; 400 defm : PatSetCC_m<any_fsetccs, SETOLE, FLE_H, Ext>;
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H A D | RISCVInstrInfoF.td | 614 defm : PatSetCC_m<strict_fsetcc, SETOLE, PseudoQuietFLE_S, Ext>; 651 defm : PatSetCC_m<any_fsetccs, SETOLE, FLE_S, Ext>;
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H A D | RISCVInstrInfoVSDPatterns.td | 1384 defm : VPatFPSetCCSDNode_VV_VF_FV<SETOLE, "PseudoVMFLE", "PseudoVMFGE">;
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/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
H A D | CSKYInstrInfoF2.td | 384 defm : BRCond_Bin_SWAP_F2<SETOLE, "f2FCMPHS", BT32, BF32, MVC32>; 408 def : Pat<(brcond (i32 (setcc FPR32Op:$rs1, fpimm0, SETOLE)), bb:$imm16), 410 def : Pat<(i32 (setcc FPR32Op:$rs1, fpimm0, SETOLE)), 412 def : Pat<(select (i32 (setcc FPR32Op:$rs1, fpimm0, SETOLE)), FPR32Op:$rx, FPR32Op:$false),
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H A D | CSKYInstrInfoF1.td | 364 defm : BRCond_Bin_SWAP<SETOLE, "FCMPHS", BT32, BF32, MVC32>; 384 def : Pat<(brcond (i32 (setcc sFPR32Op:$rs1, fpimm0, SETOLE)), bb:$imm16), 386 def : Pat<(i32 (setcc sFPR32Op:$rs1, fpimm0, SETOLE)),
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | Analysis.cpp | 206 case FCmpInst::FCMP_OLE: return ISD::SETOLE; in getFCmpCondCode() 226 case ISD::SETOLE: case ISD::SETULE: return ISD::SETLE; in getFCmpCodeWithoutNaN()
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | ISDOpcodes.h | 1581 SETOLE, // 0 1 0 1 True if ordered and less than or equal enumerator
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/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyInstrFloat.td | 88 defm LE : ComparisonFP<SETOLE, "le ", 0x5f, 0x65>;
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H A D | WebAssemblyInstrSIMD.td | 780 defm LE : SIMDConditionFP<"le", SETOLE, 69>;
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGDumper.cpp | 505 case ISD::SETOLE: return "setole"; in getOperationName()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUInstructions.td | 353 def COND_OLE : PatFrags<(ops), [(OtherVT SETOLE), (OtherVT SETLE)]>;
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H A D | SIWholeQuadMode.cpp | 855 case ISD::SETOLE: in lowerKillF32()
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H A D | R600ISelLowering.cpp | 88 ISD::SETOLE, ISD::SETONE, ISD::SETUEQ, ISD::SETUGE, in R600TargetLowering()
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelDAGToDAG.cpp | 4235 case ISD::SETOLE: in SelectCC() 4262 case ISD::SETOLE: in SelectCC() 4291 case ISD::SETOLE: in getPredicateForSetCC() 4344 case ISD::SETOLE: in getCRIdxForSetCC() 4367 case ISD::SETOLE: CC = ISD::SETOGE; Swap = true; break; in getVCmpInst()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
H A D | LanaiISelLowering.cpp | 855 case ISD::SETOLE: in IntCondCCodeToICC()
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/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
H A D | M68kISelLowering.cpp | 1789 case ISD::SETOLE: in TranslateM68kCC() 1812 case ISD::SETOLE: // flipped in TranslateM68kCC()
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/freebsd/contrib/llvm-project/llvm/include/llvm/Target/ |
H A D | TargetSelectionDAG.td | 853 def SETOLE : CondCode<"FCMP_OLE">; 1491 (setcc node:$lhs, node:$rhs, SETOLE)>;
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLoweringHVX.cpp | 345 setCondCodeAction(ISD::SETOLE, MVT::v64f16, Expand); in initializeHVXLowering() 358 setCondCodeAction(ISD::SETOLE, MVT::v32f32, Expand); in initializeHVXLowering()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64SVEInstrInfo.td | 2042 defm FCMGE_PPzZZ : sve_fp_3op_p_pd_cc<0b000, "fcmge", SETOGE, SETGE, SETOLE, SETLE>; 2050 defm FCMGE_PPzZ0 : sve_fp_2op_p_pd<0b000, "fcmge", SETOGE, SETGE, SETOLE, SETLE>; 2053 defm FCMLE_PPzZ0 : sve_fp_2op_p_pd<0b011, "fcmle", SETOLE, SETLE, SETOGE, SETGE>;
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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsMSAInstrInfo.td | 132 def vfsetole_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLE>; 133 def vfsetole_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLE>;
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/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelDAGToDAG.cpp | 588 case ISD::SETOLE: in getPTXCmpMode()
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