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Searched refs:SETGE (Results 1 – 25 of 59) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h1596 SETGE, // 1 X 0 1 1 True if greater than or equal enumerator
1608 return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE; in isSignedIntSetCC()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DAnalysis.cpp228 case ISD::SETOGE: case ISD::SETUGE: return ISD::SETGE; in getFCmpCodeWithoutNaN()
239 case ICmpInst::ICMP_SGE: return ISD::SETGE; in getICmpCondCode()
260 case ISD::SETGE: in getICmpCondCode()
H A DTargetLoweringBase.cpp588 CmpLibcallCCs[RTLIB::OGE_F32] = ISD::SETGE; in initCmpLibcallCCs()
589 CmpLibcallCCs[RTLIB::OGE_F64] = ISD::SETGE; in initCmpLibcallCCs()
590 CmpLibcallCCs[RTLIB::OGE_F128] = ISD::SETGE; in initCmpLibcallCCs()
591 CmpLibcallCCs[RTLIB::OGE_PPCF128] = ISD::SETGE; in initCmpLibcallCCs()
/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaInstrInfo.td324 def BGE : Branch_RR<0x0A, "bge", SETGE>;
331 def BGEI : Branch_RI<0x0E, "bgei", SETGE>;
338 def BGEZ : Branch_RZ<0x01, 0x03, "bgez", SETGE>;
H A DXtensaISelLowering.cpp537 case ISD::SETGE: in getBranchOpcode()
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYInstrInfoF2.td388 defm : BRCond_Bin_F2<SETGE, "f2FCMPHS", BT32, BF32, MVC32>;
432 def : Pat<(brcond (i32 (setcc FPR32Op:$rs1, fpimm0, SETGE)), bb:$imm16),
434 def : Pat<(i32 (setcc FPR32Op:$rs1, fpimm0, SETGE)),
436 def : Pat<(select (i32 (setcc FPR32Op:$rs1, fpimm0, SETGE)), FPR32Op:$rx, FPR32Op:$false),
H A DCSKYInstrInfoF1.td368 defm : BRCond_Bin<SETGE, "FCMPHS", BT32, BF32, MVC32>;
408 def : Pat<(brcond (i32 (setcc sFPR32Op:$rs1, fpimm0, SETGE)), bb:$imm16),
410 def : Pat<(i32 (setcc sFPR32Op:$rs1, fpimm0, SETGE)),
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelDAGToDAG.h179 case ISD::SETGE: in getRISCVCCForIntCC()
H A DRISCVInstrInfoVSDPatterns.td1029 defm : VPatIntegerSetCCSDNode_VV_Swappable<"PseudoVMSLE", SETLE, SETGE>;
1036 defm : VPatIntegerSetCCSDNode_VX_Swappable<"PseudoVMSLE", SETLE, SETGE>;
1044 defm : VPatIntegerSetCCSDNode_VI_Swappable<"PseudoVMSLE", SETLE, SETGE>;
1053 defm : VPatIntegerSetCCSDNode_VIPlus1_Swappable<"PseudoVMSGT", SETGE, SETLE,
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyInstrInteger.td82 defm GE_S : ComparisonInt<SETGE, "ge_s", 0x4e, 0x59>;
/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp867 SET_NEWCC(SETGE, JSGE); in EmitInstrWithCustomInserter()
881 CC == ISD::SETGE || in EmitInstrWithCustomInserter()
H A DBPFInstrInfo.td117 [{return (N->getZExtValue() == ISD::SETGE);}]>;
137 [{return (N->getZExtValue() == ISD::SETGE);}]>;
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86IntrinsicsInfo.h1501 X86_INTRINSIC_DATA(sse_comige_ss, COMI, X86ISD::COMI, ISD::SETGE),
1518 X86_INTRINSIC_DATA(sse_ucomige_ss, COMI, X86ISD::UCOMI, ISD::SETGE),
1526 X86_INTRINSIC_DATA(sse2_comige_sd, COMI, X86ISD::COMI, ISD::SETGE),
1573 X86_INTRINSIC_DATA(sse2_ucomige_sd, COMI, X86ISD::UCOMI, ISD::SETGE),
/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp201 { RTLIB::OGE_F64, "__mspabi_cmpd", ISD::SETGE }, in MSP430TargetLowering()
207 { RTLIB::OGE_F32, "__mspabi_cmpf", ISD::SETGE }, in MSP430TargetLowering()
1096 case ISD::SETGE: in EmitCMP()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstructions.td351 def COND_OGE : PatFrags<(ops), [(OtherVT SETOGE), (OtherVT SETGE)]>;
377 def COND_SGE : PatFrag<(ops), (OtherVT SETGE)>;
H A DR600Instructions.td751 0xA, "SETGE",
870 [(set i32:$dst, (selectcc i32:$src0, i32:$src1, -1, 0, SETGE))]
1723 def : CND_INT_f32 <CNDGE_INT, SETGE>;
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.td3565 def : Pat<(i1 (setcc i1:$s1, i1:$s2, SETGE)),
3673 defm : ExtSetCCPat<SETGE,
3705 defm : ExtSetCCPat<SETGE,
3853 defm : CRNotPat<(i1 (setcc i32:$s1, imm32SExt16:$imm, SETGE)),
3870 defm : CRNotPat<(i1 (setcc i32:$s1, i32:$s2, SETGE)),
3882 defm : CRNotPat<(i1 (setcc i64:$s1, imm64SExt16:$imm, SETGE)),
3899 defm : CRNotPat<(i1 (setcc i64:$s1, i64:$s2, SETGE)),
3912 defm : CRNotPat<(i1 (SetCC Ty:$s1, Ty:$s2, SETGE)),
3984 defm : CRNotPat<(i1 (any_fsetccs f32:$s1, f32:$s2, SETGE)),
4011 defm : CRNotPat<(i1 (any_fsetccs f64:$s1, f64:$s2, SETGE)),
[all …]
H A DPPCISelDAGToDAG.cpp3353 case ISD::SETGE: { in get32BitZExtCompare()
3537 case ISD::SETGE: { in get32BitSExtCompare()
3696 case ISD::SETGE: { in get64BitZExtCompare()
3855 case ISD::SETGE: { in get64BitSExtCompare()
4225 case ISD::SETGE: in SelectCC()
4252 case ISD::SETGE: in SelectCC()
4311 case ISD::SETGE: in getPredicateForSetCC()
4336 case ISD::SETGE: Invert = true; return 0; // !Bit #0 = SETUGE in getCRIdxForSetCC()
4365 case ISD::SETLE: CC = ISD::SETGE; Swap = true; break; in getVCmpInst()
4397 case ISD::SETGE: in getVCmpInst()
[all …]
H A DPPCInstrSPE.td840 def : Pat<(f32 (selectcc i1:$lhs, i1:$rhs, f32:$tval, f32:$fval, SETGE)),
861 def : Pat<(f64 (selectcc i1:$lhs, i1:$rhs, f64:$tval, f64:$fval, SETGE)),
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchFloat32InstrInfo.td188 // SETOGT/SETOGE/SETUGT/SETUGE/SETGE/SETNE/SETGT will expand into
H A DLoongArchFloat64InstrInfo.td168 // SETOGT/SETOGE/SETUGT/SETUGE/SETGE/SETNE/SETGT will expand into
/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp624 case ISD::SETGE: in intCCToAVRCC()
705 CC = ISD::SETGE; in getAVRCmp()
730 CC = ISD::SETGE; in getAVRCmp()
749 CC = ISD::SETGE; in getAVRCmp()
/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp842 case ISD::SETGE: in IntCondCCodeToICC()
1271 SetCC = DAG.getSetCC(dl, MVT::i32, ExtraShAmt, Zero, ISD::SETGE); in LowerSHL_PARTS()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCISelLowering.cpp58 case ISD::SETGE: in ISDCCtoARCCC()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp519 case ISD::SETGE: return "setge"; in getOperationName()

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