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Searched refs:SETCC0 (Results 1 – 4 of 4) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.h1084 const SDNode *SETCC0,
H A DX86ISelLowering.cpp54293 SDValue SETCC0 = DAG.getSetCC(DL, VT, BaseOp, RHS, CC); in combineSetCC() local
54297 SETCC0, SETCC1); in combineSetCC()
58021 const SDNode *LogicOp, const SDNode *SETCC0, const SDNode *SETCC1) const { in isDesirableToCombineLogicOpOfSETCC() argument
58024 EVT OpVT = SETCC0->getOperand(0).getValueType(); in isDesirableToCombineLogicOpOfSETCC()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorTypes.cpp6085 SDValue SETCC0 = Cond->getOperand(0); in WidenVSELECTMask()
6087 EVT VT0 = getSetCCResultType(getSETCCOperandType(SETCC0)); in WidenVSELECTMask()
6110 SETCC0 = convertMask(SETCC0, VT0, MaskVT); in WidenVSELECTMask()
6112 Cond = DAG.getNode(Cond->getOpcode(), SDLoc(Cond), MaskVT, SETCC0, SETCC1); in WidenVSELECTMask()
6081 SDValue SETCC0 = Cond->getOperand(0); WidenVSELECTMask() local
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetLowering.h4330 const SDNode *LogicOp, const SDNode *SETCC0, const SDNode *SETCC1) const { in isDesirableToCombineLogicOpOfSETCC() argument