Searched refs:SCIdx (Results 1 – 6 of 6) sorted by relevance
846 unsigned SCIdx = addSchedClass(ItinDef, Writes, Reads, /*ProcIndices*/ {0}); in collectSchedClasses() local847 InstrClassMap[Inst->TheDef] = SCIdx; in collectSchedClasses()866 unsigned SCIdx = getSchedClassIdx(*Inst); in collectSchedClasses() local867 if (!SCIdx) { in collectSchedClasses()874 CodeGenSchedClass &SC = getSchedClass(SCIdx); in collectSchedClasses()897 for (const Record *RWDef : SchedClasses[SCIdx].InstRWs) { in collectSchedClasses()1016 unsigned SCIdx = Pos->second; in createInstRWClass() local1017 ClassInstrs[SCIdx].push_back(InstDef); in createInstRWClass()1062 unsigned SCIdx = SchedClasses.size(); in createInstRWClass() local1063 SchedClasses.emplace_back(SCIdx, createSchedClassName(InstDefs), nullptr); in createInstRWClass()[all …]
618 void inferFromInstRWs(unsigned SCIdx);
84 unsigned SCIdx = TII->get(AArch64::STPDi).getSchedClass(); in shouldAddSTPToBlock() local86 SchedModel.getMCSchedModel()->getSchedClassDesc(SCIdx); in shouldAddSTPToBlock()
227 unsigned SCIdx = InstDesc->getSchedClass(); in shouldReplaceInst() local229 SchedModel.getMCSchedModel()->getSchedClassDesc(SCIdx); in shouldReplaceInst()
243 unsigned SCIdx = TII->get(Opcode).getSchedClass(); in computeInstrLatency() local244 return capLatency(SchedModel.computeInstrLatency(*STI, SCIdx)); in computeInstrLatency()
1410 for (unsigned SCIdx = 1, SCEnd = SCTab.size(); SCIdx != SCEnd; ++SCIdx) { in emitSchedClassTables() local1411 MCSchedClassDesc &MCDesc = SCTab[SCIdx]; in emitSchedClassTables()1412 const CodeGenSchedClass &SchedClass = SchedModels.getSchedClass(SCIdx); in emitSchedClassTables()1425 << MCDesc.NumReadAdvanceEntries << "}, // #" << SCIdx << '\n'; in emitSchedClassTables()