Searched refs:SCIdx (Results 1 – 6 of 6) sorted by relevance
886 unsigned SCIdx = addSchedClass(ItinDef, Writes, Reads, /*ProcIndices*/ {0}); in collectSchedClasses() local887 InstrClassMap[Inst->TheDef] = SCIdx; in collectSchedClasses()908 unsigned SCIdx = getSchedClassIdx(*Inst); in collectSchedClasses() local909 if (!SCIdx) { in collectSchedClasses()916 CodeGenSchedClass &SC = getSchedClass(SCIdx); in collectSchedClasses()939 const RecVec &RWDefs = SchedClasses[SCIdx].InstRWs; in collectSchedClasses()1059 unsigned SCIdx = Pos->second; in createInstRWClass() local1060 ClassInstrs[SCIdx].push_back(InstDef); in createInstRWClass()1104 unsigned SCIdx = SchedClasses.size(); in createInstRWClass() local1105 SchedClasses.emplace_back(SCIdx, createSchedClassName(InstDefs), nullptr); in createInstRWClass()[all …]
629 void inferFromInstRWs(unsigned SCIdx);
86 unsigned SCIdx = TII->get(AArch64::STPDi).getSchedClass(); in shouldAddSTPToBlock() local88 SchedModel.getMCSchedModel()->getSchedClassDesc(SCIdx); in shouldAddSTPToBlock()
229 unsigned SCIdx = InstDesc->getSchedClass(); in shouldReplaceInst() 231 SchedModel.getMCSchedModel()->getSchedClassDesc(SCIdx); in shouldReplaceInst() 228 unsigned SCIdx = InstDesc->getSchedClass(); shouldReplaceInst() local
246 unsigned SCIdx = TII->get(Opcode).getSchedClass(); in computeInstrLatency() local 247 return capLatency(SchedModel.computeInstrLatency(*STI, SCIdx)); in computeInstrLatency()
1431 for (unsigned SCIdx = 1, SCEnd = SCTab.size(); SCIdx != SCEnd; ++SCIdx) { in EmitSchedClassTables() local1432 MCSchedClassDesc &MCDesc = SCTab[SCIdx]; in EmitSchedClassTables()1433 const CodeGenSchedClass &SchedClass = SchedModels.getSchedClass(SCIdx); in EmitSchedClassTables()1445 << MCDesc.NumReadAdvanceEntries << "}, // #" << SCIdx << '\n'; in EmitSchedClassTables()