| /freebsd/sys/contrib/device-tree/Bindings/ata/ |
| H A D | nvidia,tegra124-ahci.txt | 1 Tegra SoC SATA AHCI controller
9 - AHCI register set (SATA BAR5)
10 - SATA register set
11 - interrupts : Defines the interrupt used by SATA
27 - sata-phy : XUSB PADCTL SATA PHY
29 - hvdd-supply : Defines the SATA HVDD regulator
30 - vddio-supply : Defines the SATA VDDIO regulator
31 - avdd-supply : Defines the SATA AVDD regulator
32 - target-5v-supply : Defines the SATA 5V power regulator
33 - target-12v-supply : Defines the SATA 12V power regulator
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| H A D | imx-sata.txt | 1 * Freescale i.MX AHCI SATA Controller
3 The Freescale i.MX SATA controller mostly conforms to the AHCI interface
8 - "fsl,imx53-ahci" for i.MX53 SATA controller
9 - "fsl,imx6q-ahci" for i.MX6Q SATA controller
10 - "fsl,imx6qp-ahci" for i.MX6QP SATA controller
11 - interrupts : interrupt mapping for SATA IRQ
24 - fsl,no-spread-spectrum : disable spread-spectrum clocking on the SATA
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| H A D | ahci-platform.txt | 1 * AHCI SATA Controller
3 SATA nodes are defined to describe on-chip Serial ATA controllers.
4 Each SATA controller should have its own node.
21 - interrupts : <interrupt mapping for SATA IRQ>
32 - target-supply : regulator for SATA target power
34 - phys : reference to the SATA PHY node
49 - phys : reference to the SATA PHY node
50 - target-supply : regulator for SATA target power
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| H A D | cortina,gemini-sata-bridge.txt | 1 * Cortina Systems Gemini SATA Bridge
3 The Gemini SATA bridge in a SoC-internal PATA to SATA bridge that
5 them in different configurations to two SATA ports.
11 - resets: phandles to the reset lines for both SATA bridges
17 the ATA controller and SATA bridges. Values 0..3:
37 - cortina,gemini-enable-sata-bridge: enables the PATA to SATA bridge
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| H A D | exynos-sata.txt | 1 * Samsung AHCI SATA Controller
3 SATA nodes are defined to describe on-chip Serial ATA controllers.
4 Each SATA controller should have its own node.
8 - interrupts : <interrupt mapping for SATA IRQ>
17 - clock-names : Shall be "sata" for the external SATA bus clock,
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| H A D | qcom-sata.txt | 1 * Qualcomm AHCI SATA Controller
3 SATA nodes are defined to describe on-chip Serial ATA controllers.
4 Each SATA controller should have its own node.
8 - interrupts : <interrupt mapping for SATA IRQ>
17 "slave_iface" - Fabric port AHB clock for SATA
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| H A D | fsl-sata.txt | 1 * Freescale 8xxx/3.0 Gb/s SATA nodes
3 SATA nodes are defined to describe on-chip Serial ATA controllers.
4 Each SATA port should have its own node.
11 - interrupts : <interrupt mapping for SATA IRQ>
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| H A D | ahci-st.txt | 1 STMicroelectronics STi SATA controller
3 This binding describes a SATA device.
8 - interrupts : Interrupt associated with the SATA device
16 - resets : The power-down, soft-reset and power-reset lines of SATA IP
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| H A D | apm-xgene.txt | 1 * APM X-Gene 6.0 Gb/s SATA host controller nodes
3 SATA host controller nodes are defined to describe on-chip Serial ATA
4 controllers. Each SATA controller (pair of ports) have its own node.
19 - interrupts : Interrupt-specifier for SATA host controller IRQ.
24 * "sata-phy" for the SATA 6.0Gbps PHY
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| H A D | brcm,sata-brcm.txt | 3 SATA nodes are defined to describe on-chip Serial ATA controllers.
4 Each SATA controller should have its own node.
16 - interrupts : interrupt mapping for SATA IRQ
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| H A D | marvell.txt | 1 * Marvell Orion SATA
7 - nr-ports : Number of SATA ports in use.
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| H A D | ahci-da850.txt | 1 Device tree binding for the TI DA850 AHCI SATA Controller
9 for enabling/disabling the SATA clock receiver
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| /freebsd/sys/contrib/device-tree/Bindings/clock/ |
| H A D | mvebu-gated-clock.txt | 20 15 sata0 SATA Host 0
25 30 sata1 SATA Host 0
37 14 sata0_link SATA 0 Link
38 15 sata0_core SATA 0 Core
43 20 sata1_link SATA 1 Link
44 21 sata1_core SATA 1 Core
70 15 sata0 SATA 0
79 30 sata1 SATA 1
90 15 sata0 SATA 0
109 15 sata0 SATA Host 0
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/phy/ |
| H A D | qcom-ipq806x-sata-phy.txt | 1 Qualcomm IPQ806x SATA PHY Controller
4 SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers.
5 Each SATA PHY controller should have its own node.
9 - reg: offset and length of the SATA PHY register set;
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| H A D | qcom-apq8064-sata-phy.txt | 1 Qualcomm APQ8064 SATA PHY Controller
4 SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers.
5 Each SATA PHY controller should have its own node.
9 - reg: offset and length of the SATA PHY register set;
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| H A D | phy-mvebu.txt | 1 * Marvell MVEBU SATA PHY
3 Power control for the SATA phy found on Marvell MVEBU SoCs.
9 - reg : Offset and length of the register set for the SATA device
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| H A D | phy-miphy365x.txt | 5 for SATA and PCIe.
29 - sata: For SATA devices
33 - st,sata-gen : Generation of locally attached SATA IP. Expected values
37 - st,sata-tx-pol-inv : Bool property to invert the polarity SATA Tx (Txn/Txp)
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| H A D | st-spear-miphy.txt | 4 ST Microelectronics SPEAr miphy is a phy controller supporting PCIe and SATA.
11 - cell[1]: 0 if phy used for SATA, 1 for PCIe.
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| H A D | phy-miphy28lp.txt | 5 for SATA, PCIe or USB3.
10 which contain the SATA, PCIe or USB3 mode setting bits.
27 registers used as glue-logic to setup the device for SATA/PCIe or USB3
39 - st,sata_gen : to select which SATA_SPDMODE has to be set in the SATA system config
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| H A D | samsung-phy.txt | 101 Samsung SATA PHY Controller
104 SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers.
105 Each SATA PHY controller should have its own node.
109 - reg : offset and length of the SATA PHY register set;
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| /freebsd/sys/contrib/device-tree/src/arm/marvell/ |
| H A D | armada-388.dtsi | 10 * SATA ports. So we can reuse the dtsi of the Armada 385, override the pinctrl
11 * property and the name of the SoC, and add the second SATA host which control
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| /freebsd/sys/dev/pms/RefTisa/tisa/sassata/sas/ini/ |
| H A D | itdio.c | 400 satIOContext = &(tdIORequestBody->transport.SATA.satIOContext); in tiINIIOStart()
406 tdIORequestBody->transport.SATA.tiSenseData.senseData = agNULL; in tiINIIOStart()
407 tdIORequestBody->transport.SATA.tiSenseData.senseLen = 0; in tiINIIOStart()
410 &tdIORequestBody->transport.SATA.agSATARequestBody.fis.fisRegHostToDev; in tiINIIOStart()
412 satIOContext->pSense = &tdIORequestBody->transport.SATA.sensePayload; in tiINIIOStart()
413 satIOContext->pTiSenseData = &tdIORequestBody->transport.SATA.tiSenseData; in tiINIIOStart()
1056 satIOContext = &(tdIORequestBody->transport.SATA.satIOContext); in tiINISuperIOStart()
1062 tdIORequestBody->transport.SATA.tiSenseData.senseData = agNULL; in tiINISuperIOStart()
1063 tdIORequestBody->transport.SATA.tiSenseData.senseLen = 0; in tiINISuperIOStart()
1066 &tdIORequestBody->transport.SATA.agSATARequestBody.fis.fisRegHostToDev; in tiINISuperIOStart()
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/mips/cavium/ |
| H A D | sata-uctl.txt | 1 * UCTL SATA controller glue
4 and the SATA AHCI host controller (UAHC). It performs the following functions:
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| /freebsd/sys/contrib/device-tree/Bindings/powerpc/4xx/ |
| H A D | akebono.txt | 24 1.b) The Advanced Host Controller Interface (AHCI) SATA node
26 Represents the advanced host controller SATA interface.
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| /freebsd/sys/contrib/device-tree/src/arm64/renesas/ |
| H A D | salvator-xs.dtsi | 36 output-low; /* enable SATA by default */
37 line-name = "PCIE/SATA switch";
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