| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 343 SADDO, enumerator
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| H A D | SelectionDAGNodes.h | 3376 (Opc == ISD::SADDO || Opc == ISD::UADDO || Opc == ISD::SSUBO ||
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| H A D | BasicTTIImpl.h | 2528 ISD = ISD::SADDO; in getTypeBasedIntrinsicInstrCost()
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| H A D | TargetLowering.h | 2982 case ISD::SADDO: in isCommutativeBinOp()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 118 setOperationAction(ISD::SADDO, VT, Custom); in M68kTargetLowering()
1384 case ISD::SADDO: in LowerOperation()
1541 case ISD::SADDO: in isOverflowArithmetic()
1580 case ISD::SADDO: in lowerOverflowArithmetic()
2465 (Cond.getOperand(0).getOpcode() == ISD::SADDO || in LowerBRCOND()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.h | 101 SADDO, SSUBO, UADDO, USUBO, ADDCARRY, SUBCARRY, enumerator
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| H A D | SystemZOperators.td | 306 def z_saddo : SDNode<"SystemZISD::SADDO", SDT_ZBinaryWithFlags>;
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| H A D | SystemZISelDAGToDAG.cpp | 1421 case SystemZISD::SADDO: in tryFoldLoadStoreIntoMemOperand()
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| H A D | SystemZISelLowering.cpp | 198 setOperationAction(ISD::SADDO, VT, Custom); in SystemZTargetLowering()
4781 case ISD::SADDO: in lowerXALUO()
4782 BaseOp = SystemZISD::SADDO; in lowerXALUO()
7058 case ISD::SADDO: in LowerOperation()
7401 OPCODE(SADDO); in getTargetNodeName()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 360 case ISD::SADDO: return "saddo"; in getOperationName()
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| H A D | LegalizeVectorOps.cpp | 455 case ISD::SADDO: in LegalizeOp()
1163 case ISD::SADDO: in Expand()
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| H A D | LegalizeIntegerTypes.cpp | 233 case ISD::SADDO: in PromoteIntegerResult()
1335 unsigned Opcode = N->getOpcode() == ISD::SADDO ? ISD::ADD : ISD::SUB; in PromoteIntRes_SADDSUBO()
3077 case ISD::SADDO: in ExpandIntegerResult()
4705 assert((Node->getOpcode() == ISD::SADDO || Node->getOpcode() == ISD::SSUBO) && in ExpandIntRes_SADDSUBO()
4713 bool IsAdd = Node->getOpcode() == ISD::SADDO; in ExpandIntRes_SADDSUBO()
4733 SDValue Sum = DAG.getNode(Node->getOpcode() == ISD::SADDO ? in ExpandIntRes_SADDSUBO()
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| H A D | SelectionDAG.cpp | 4158 case ISD::SADDO: in computeKnownBits()
4985 case ISD::SADDO: in ComputeNumSignBits()
5583 case ISD::SADDO: in canCreateUndefOrPoison()
10720 case ISD::SADDO: in getNode()
10746 if (Opcode == ISD::UADDO || Opcode == ISD::SADDO) in getNode()
13058 assert((Opcode == ISD::UADDO || Opcode == ISD::SADDO || in UnrollVectorOverflowOp()
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| H A D | LegalizeVectorTypes.cpp | 222 case ISD::SADDO: in ScalarizeVectorResult()
1368 case ISD::SADDO: in SplitVectorResult()
4835 case ISD::SADDO: in WidenVectorResult()
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| H A D | DAGCombiner.cpp | 1904 case ISD::SADDO: in visit()
3441 bool IsSigned = (ISD::SADDO == N->getOpcode()); in visitADDO()
3836 TLI.isOperationLegalOrCustom(ISD::SADDO, N->getValueType(0))) in visitSADDO_CARRY()
3837 return DAG.getNode(ISD::SADDO, DL, N->getVTList(), N0, N1); in visitSADDO_CARRY()
4553 return DAG.getNode(ISD::SADDO, DL, N->getVTList(), N0, in visitSUBO()
5865 return DAG.getNode(IsSigned ? ISD::SADDO : ISD::UADDO, DL, in visitMULO()
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| H A D | TargetLowering.cpp | 10843 OverflowOp = ISD::SADDO; in expandAddSubSat()
11424 bool IsAdd = Node->getOpcode() == ISD::SADDO; in expandSADDSUBO()
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| H A D | LegalizeDAG.cpp | 4112 case ISD::SADDO: in ExpandNode()
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| H A D | SelectionDAGBuilder.cpp | 7549 case Intrinsic::sadd_with_overflow: Op = ISD::SADDO; break; in visitIntrinsicCall()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86TargetTransformInfo.cpp | 4390 { ISD::SADDO, MVT::i64, { 2, 2, 4, 6 } }, in getIntrinsicInstrCost()
4455 { ISD::SADDO, MVT::i32, { 2, 2, 4, 6 } }, in getIntrinsicInstrCost()
4456 { ISD::SADDO, MVT::i16, { 2, 2, 4, 6 } }, in getIntrinsicInstrCost()
4457 { ISD::SADDO, MVT::i8, { 2, 2, 4, 6 } }, in getIntrinsicInstrCost()
4568 ISD = ISD::SADDO; in getIntrinsicInstrCost()
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| H A D | X86ISelLowering.cpp | 2560 setOperationAction(ISD::SADDO, VT, Custom); in X86TargetLowering()
24740 case ISD::SADDO: in getX86XALUOOp()
25118 CondOpcode == ISD::UADDO || CondOpcode == ISD::SADDO || in LowerSELECT()
29211 DAG.getNode(Opcode == ISD::SADDSAT ? ISD::SADDO : ISD::SSUBO, DL, in LowerADDSAT_SUBSAT()
33690 case ISD::SADDO: in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 823 setOperationAction({ISD::SADDO, ISD::SSUBO, ISD::UADDO, ISD::USUBO, in initActions()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1638 setOperationAction(ISD::SADDO, VT, Expand); in HexagonTargetLowering()
1716 ISD::SREM, ISD::UREM, ISD::SDIVREM, ISD::UDIVREM, ISD::SADDO, in HexagonTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 1144 setOperationAction(ISD::SADDO, MVT::i32, Custom); in ARMTargetLowering()
5007 case ISD::SADDO: in getARMXALUOOp()
5204 (Opc == ISD::SADDO || Opc == ISD::UADDO || Opc == ISD::SSUBO || in LowerSELECT()
5803 (Opc == ISD::SADDO || Opc == ISD::UADDO || Opc == ISD::SSUBO || in LowerBRCOND()
5852 (Opc == ISD::SADDO || Opc == ISD::UADDO || Opc == ISD::SSUBO || in LowerBR_CC()
10704 case ISD::SADDO: in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 644 ISD::ROTL, ISD::ROTR, ISD::SADDO, ISD::SADDO_CARRY, in NVPTXTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 711 setOperationAction(ISD::SADDO, MVT::i32, Custom); in AArch64TargetLowering()
712 setOperationAction(ISD::SADDO, MVT::i64, Custom); in AArch64TargetLowering()
3999 case ISD::SADDO: in getAArch64XALUOOp()
7271 case ISD::SADDO: in LowerOperation()
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