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Searched refs:SA0 (Results 1 – 10 of 10) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCChecker.h111 return (Hexagon::SA0 == R || Hexagon::LC0 == R || Hexagon::SA1 == R || in isLoopRegister()
H A DHexagonMCChecker.cpp46 Defs[Hexagon::SA0].insert(Unconditional); // FIXME: define or change SA0? in init()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonPseudo.td91 Defs = [PC, LC0], Uses = [SA0, LC0] in {
105 Defs = [PC, LC0, LC1], Uses = [SA0, SA1, LC0, LC1] in {
149 let Defs = [SA0, LC0, USR], isCodeGenOnly = 1, isExtended = 1,
H A DHexagonRegisterInfo.cpp162 Reserved.set(Hexagon::SA0); // C0 in getReservedRegs()
H A DHexagonRegisterInfo.td173 def SA0: Rc<0, "sa0", ["c0"]>, DwarfRegNum<[67]>;
206 def C1_0 : Rcc<0, "c1:0", [SA0, LC0], ["lc0:sa0"]>, DwarfRegNum<[67]>;
560 (add LC0, SA0, LC1, SA1, P3_0, C5, C8, PC, UGP, GP, CS0, CS1,
H A DHexagonHardwareLoops.cpp1007 static const Register Regs01[] = { LC0, SA0, LC1, SA1 }; in isInvalidLoopOperation()
H A DHexagonISelLowering.cpp327 .Case("sa0", Hexagon::SA0) in getRegisterByName()
H A DHexagonDepInstrInfo.td5022 let Uses = [LC0, SA0];
5033 let Uses = [LC0, LC1, SA0, SA1];
5646 let Defs = [LC0, SA0, USR];
5664 let Defs = [LC0, SA0, USR];
5728 let Defs = [LC0, P3, SA0, USR];
5747 let Defs = [LC0, P3, SA0, USR];
5765 let Defs = [LC0, P3, SA0, USR];
5784 let Defs = [LC0, P3, SA0, USR];
5802 let Defs = [LC0, P3, SA0, USR];
5821 let Defs = [LC0, P3, SA0, US
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineSelect.cpp2449 Value *SV0, *SV1, *SA0, *SA1; in foldSelectFunnelShift() local
2451 m_ZExtOrSelf(m_Value(SA0))))) || in foldSelectFunnelShift()
2461 std::swap(SA0, SA1); in foldSelectFunnelShift()
2469 if (match(SA1, m_OneUse(m_Sub(m_SpecificInt(Width), m_Specific(SA0))))) in foldSelectFunnelShift()
2470 ShAmt = SA0; in foldSelectFunnelShift()
2471 else if (match(SA0, m_OneUse(m_Sub(m_SpecificInt(Width), m_Specific(SA1))))) in foldSelectFunnelShift()
2480 bool IsFshl = (ShAmt == SA0); in foldSelectFunnelShift()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/Disassembler/
H A DHexagonDisassembler.cpp675 /* 0 */ SA0, LC0, SA1, LC1, in DecodeCtrRegsRegisterClass()