/freebsd/sys/kern/ |
H A D | md4c.c | 52 #define S31 3 macro 229 HH (a, b, c, d, x[ 0], S31); /* 33 */ in MD4Transform() 233 HH (a, b, c, d, x[ 2], S31); /* 37 */ in MD4Transform() 237 HH (a, b, c, d, x[ 1], S31); /* 41 */ in MD4Transform() 241 HH (a, b, c, d, x[ 3], S31); /* 45 */ in MD4Transform()
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H A D | md5c.c | 278 #define S31 4 in MD5Transform() macro 282 HH (a, b, c, d, x[ 5], S31, 0xfffa3942); /* 33 */ in MD5Transform() 286 HH (a, b, c, d, x[ 1], S31, 0xa4beea44); /* 37 */ in MD5Transform() 290 HH (a, b, c, d, x[13], S31, 0x289b7ec6); /* 41 */ in MD5Transform() 294 HH (a, b, c, d, x[ 9], S31, 0xd9d4d039); /* 45 */ in MD5Transform()
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/freebsd/sbin/ipf/ipftest/ |
H A D | md5.c | 248 #define S31 4 in Transform() macro 252 HH ( a, b, c, d, in[ 5], S31, UL(4294588738)); /* 33 */ in Transform() 256 HH ( a, b, c, d, in[ 1], S31, UL(2763975236)); /* 37 */ in Transform() 260 HH ( a, b, c, d, in[13], S31, UL( 681279174)); /* 41 */ in Transform() 264 HH ( a, b, c, d, in[ 9], S31, UL(3654602809)); /* 45 */ in Transform()
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/freebsd/sys/contrib/device-tree/src/mips/ingenic/ |
H A D | qi_lb60.dts | 148 <MATRIX_KEY(3, 5, KEY_B)>, /* S31 */
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64PBQPRegAlloc.cpp | 55 case AArch64::S31: in isOdd()
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H A D | AArch64RegisterInfo.td | 379 def S31 : AArch64Reg<31, "s31", [H31]>, DwarfRegAlias<B31>; 414 def D31 : AArch64Reg<31, "d31", [S31], ["v31", ""]>, DwarfRegAlias<B31>;
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H A D | AArch64AsmPrinter.cpp | 1709 else if (AArch64::S0 <= DestReg && DestReg <= AArch64::S31) in emitFMov0()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMRegisterInfo.td | 117 def S30 : ARMFReg<30, "s30">; def S31 : ARMFReg<31, "s31">; 136 def D15 : ARMReg<15, "d15", [S30, S31]>, DwarfRegNum<[271]>;
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H A D | ARMExpandPseudoInsts.cpp | 1223 (Reg >= ARM::S0 && Reg <= ARM::S31)) in determineFPRegsToClear() 1234 } else if (Reg >= ARM::S0 && Reg <= ARM::S31) { in determineFPRegsToClear() 1592 for (int Reg = ARM::S16; Reg <= ARM::S31; ++Reg) in CMSESaveClearFPRegsV81() 1756 (Reg >= ARM::S0 && Reg <= ARM::S31)) in definesOrUsesFPReg() 1797 for (int Reg = ARM::S16; Reg <= ARM::S31; ++Reg) in CMSERestoreFPRegsV81()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMMCTargetDesc.cpp | 279 {codeview::RegisterId::ARM_FS31, ARM::S31}, in initLLVMToCVRegMapping()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
H A D | AArch64MCTargetDesc.cpp | 172 {codeview::RegisterId::ARM64_S31, AArch64::S31}, in initLLVMToCVRegMapping()
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCFrameLowering.cpp | 194 {PPC::S31, -8}, in getCalleeSavedSpillSlots() 2095 unsigned MinVR = Subtarget.hasSPE() ? PPC::S31 : PPC::V31; in processFunctionBeforeFrameFinalized()
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H A D | PPCRegisterInfo.td | 390 S31, S0, S1)>;
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/ |
H A D | ARMDisassembler.cpp | 1500 ARM::S28, ARM::S29, ARM::S30, ARM::S31
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
H A D | AArch64AsmParser.cpp | 5335 (Reg >= AArch64::S16 && Reg <= AArch64::S31) || in validateInstruction()
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