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Searched refs:Rt1 (Results 1 – 2 of 2) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/
H A DAArch64AsmParser.cpp5489 unsigned Rt1 = Inst.getOperand(1).getReg(); in validateInstruction() local
5492 if (RI->isSubRegisterEq(Rt1, Rs) || RI->isSubRegisterEq(Rt2, Rs) || in validateInstruction()
/freebsd/contrib/llvm-project/clang/lib/CodeGen/
H A DCGBuiltin.cpp8731 Value *Rt1 = Builder.CreateExtractValue(RtAndRt2, 0); in EmitARMBuiltinExpr() local
8733 Rt1 = Builder.CreateZExt(Rt1, Int64Ty); in EmitARMBuiltinExpr()
8737 RtAndRt2 = Builder.CreateOr(RtAndRt2, Rt1); in EmitARMBuiltinExpr()