Searched refs:Rsq (Results 1 – 3 of 3) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCodeGenPrepare.cpp | 883 Value *Rsq = Builder.CreateUnaryIntrinsic(Intrinsic::amdgcn_rsq, ScaledInput); in emitRsqIEEE1ULP() local
887 return Builder.CreateFMul(Rsq, OutputScaleFactor); in emitRsqIEEE1ULP()
1038 Value *Rsq = in visitFDivElement() local
1040 if (Rsq) in visitFDivElement()
1041 return Rsq; in visitFDivElement()
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| H A D | AMDGPULegalizerInfo.cpp | 5396 auto Rsq = B.buildIntrinsic(Intrinsic::amdgcn_rsq, {Ty}) in legalizeRsqClampIntrinsic() local
5406 auto ClampMax = UseIEEE ? B.buildFMinNumIEEE(Ty, Rsq, MaxFlt, Flags) : in legalizeRsqClampIntrinsic()
5407 B.buildFMinNum(Ty, Rsq, MaxFlt, Flags); in legalizeRsqClampIntrinsic()
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| H A D | SIISelLowering.cpp | 8466 SDValue Rsq = DAG.getNode(AMDGPUISD::RSQ, DL, VT, Op.getOperand(1)); in LowerINTRINSIC_WO_CHAIN() local
8467 SDValue Tmp = DAG.getNode(ISD::FMINNUM, DL, VT, Rsq, in LowerINTRINSIC_WO_CHAIN()
14418 SDValue Rsq = in performFDivCombine() local
14420 return IsNegative ? DAG.getNode(ISD::FNEG, SL, VT, Rsq, Flags) : Rsq; in performFDivCombine()
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