Searched refs:RotateAmt (Results 1 – 6 of 6) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/IR/ |
| H A D | Instructions.cpp | 2473 int RotateAmt = -1; in matchShuffleAsBitRotate() local
2482 if (0 <= RotateAmt && Offset != RotateAmt) in matchShuffleAsBitRotate()
2484 RotateAmt = Offset; in matchShuffleAsBitRotate()
2487 return RotateAmt; in matchShuffleAsBitRotate()
2492 unsigned MaxSubElts, unsigned &NumSubElts, unsigned &RotateAmt) { in isBitRotateMask() argument
2497 RotateAmt = EltRotateAmt * EltSizeInBits; in isBitRotateMask()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/SandboxIR/ |
| H A D | Instruction.h | 955 unsigned &NumSubElts, unsigned &RotateAmt) { in isBitRotateMask() argument
957 Mask, EltSizeInBits, MinSubElts, MaxSubElts, NumSubElts, RotateAmt); in isBitRotateMask()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 5130 SDValue RotateAmt = Val.getOperand(1); in tryAsSingleRLDCL() local
5131 if (RotateAmt.getOpcode() == ISD::Constant) in tryAsSingleRLDCL()
5136 SDValue Ops[] = {Val.getOperand(0), RotateAmt, getI32Imm(MB, dl)}; in tryAsSingleRLDCL()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 5355 MVT &RotateVT, unsigned &RotateAmt) { in isLegalBitRotate() argument
5360 NumElts, NumSubElts, RotateAmt)) in isLegalBitRotate()
5378 unsigned RotateAmt; in lowerVECTOR_SHUFFLEAsRotate() local
5380 if (!isLegalBitRotate(SVN->getMask(), VT, Subtarget, RotateVT, RotateAmt)) in lowerVECTOR_SHUFFLEAsRotate()
5388 if (RotateVT.getScalarType() == MVT::i16 && RotateAmt == 8) in lowerVECTOR_SHUFFLEAsRotate()
5392 DAG.getConstant(RotateAmt, DL, RotateVT)); in lowerVECTOR_SHUFFLEAsRotate()
5417 unsigned RotateAmt; in lowerShuffleViaVRegSplitting() local
5419 if (isLegalBitRotate(Mask, VT, Subtarget, RotateVT, RotateAmt)) in lowerShuffleViaVRegSplitting()
5972 unsigned RotateAmt; in lowerVECTOR_SHUFFLE() local
5976 !isLegalBitRotate(Mask, VT, Subtarget, RotateVT, RotateAmt))) { in lowerVECTOR_SHUFFLE()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | Instructions.h | 2411 unsigned &RotateAmt);
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 11773 unsigned RotateAmt, NumSubElts; in matchShuffleAsBitRotate() local
11775 MaxSubElts, NumSubElts, RotateAmt)) in matchShuffleAsBitRotate()
11780 return RotateAmt; in matchShuffleAsBitRotate()
11796 int RotateAmt = matchShuffleAsBitRotate(RotateVT, VT.getScalarSizeInBits(), in lowerShuffleAsBitRotate() local
11798 if (RotateAmt < 0) in lowerShuffleAsBitRotate()
11805 if ((RotateAmt % 16) == 0) in lowerShuffleAsBitRotate()
11808 unsigned ShlAmt = RotateAmt; in lowerShuffleAsBitRotate()
11809 unsigned SrlAmt = RotateVT.getScalarSizeInBits() - RotateAmt; in lowerShuffleAsBitRotate()
11821 DAG.getTargetConstant(RotateAmt, DL, MVT::i8)); in lowerShuffleAsBitRotate()
39505 int RotateAmt = matchShuffleAsBitRotate(ShuffleVT, MaskScalarSizeInBits, in matchUnaryPermuteShuffle() local
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