Home
last modified time | relevance | path

Searched refs:RootDef (Results 1 – 3 of 3) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/
H A DRISCVInstructionSelector.cpp390 MachineInstr *RootDef = MRI.getVRegDef(Root.getReg()); in selectAddrRegImm() local
391 if (RootDef->getOpcode() == TargetOpcode::G_FRAME_INDEX) { in selectAddrRegImm()
393 [=](MachineInstrBuilder &MIB) { MIB.add(RootDef->getOperand(1)); }, in selectAddrRegImm()
399 MachineOperand &LHS = RootDef->getOperand(1); in selectAddrRegImm()
400 MachineOperand &RHS = RootDef->getOperand(2); in selectAddrRegImm()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64InstructionSelector.cpp407 ComplexRendererFns tryFoldAddLowIntoImm(MachineInstr &RootDef, unsigned Size,
7409 MachineInstr *RootDef = MRI.getVRegDef(Root.getReg()); in selectAddrModeUnscaled() local
7411 MachineOperand &OffImm = RootDef->getOperand(2); in selectAddrModeUnscaled()
7424 MachineOperand &Base = RootDef->getOperand(1); in selectAddrModeUnscaled()
7434 AArch64InstructionSelector::tryFoldAddLowIntoImm(MachineInstr &RootDef, in tryFoldAddLowIntoImm() argument
7437 if (RootDef.getOpcode() != AArch64::G_ADD_LOW) in tryFoldAddLowIntoImm()
7439 MachineInstr &Adrp = *MRI.getVRegDef(RootDef.getOperand(1).getReg()); in tryFoldAddLowIntoImm()
7452 auto &MF = *RootDef.getParent()->getParent(); in tryFoldAddLowIntoImm()
7457 MachineIRBuilder MIRBuilder(RootDef); in tryFoldAddLowIntoImm()
7479 MachineInstr *RootDef = MRI.getVRegDef(Root.getReg()); in selectAddrModeIndexed() local
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstructionSelector.cpp4648 if (const MachineInstr *RootDef = MRI->getVRegDef(Root.getReg())) { in selectMUBUFScratchOffen() local
4663 } else if (RootDef->getOpcode() == AMDGPU::G_FRAME_INDEX) { in selectMUBUFScratchOffen()
4664 FI = RootDef->getOperand(1).getIndex(); in selectMUBUFScratchOffen()
4886 const MachineInstr *RootDef = MRI->getVRegDef(Root.getReg()); in selectDS1Addr1OffsetImpl() local
4887 if (!RootDef) in selectDS1Addr1OffsetImpl()
4902 } else if (RootDef->getOpcode() == AMDGPU::G_SUB) { in selectDS1Addr1OffsetImpl()
4951 const MachineInstr *RootDef = MRI->getVRegDef(Root.getReg()); in selectDSReadWrite2Impl() local
4952 if (!RootDef) in selectDSReadWrite2Impl()
4969 } else if (RootDef->getOpcode() == AMDGPU::G_SUB) { in selectDSReadWrite2Impl()