Searched refs:RevAmt (Results 1 – 2 of 2) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 2205 unsigned RevAmt = BitWidth - Amt; in SimplifyDemandedBits() local
2209 APInt Demanded0 = DemandedBits.rotr(IsROTL ? Amt : RevAmt); in SimplifyDemandedBits()
2220 DemandedBits.countr_zero() >= (IsROTL ? Amt : RevAmt)) { in SimplifyDemandedBits()
2221 Op1 = TLO.DAG.getConstant(IsROTL ? Amt : RevAmt, dl, Op1.getValueType()); in SimplifyDemandedBits()
2225 DemandedBits.countl_zero() >= (IsROTL ? RevAmt : Amt)) { in SimplifyDemandedBits()
2226 Op1 = TLO.DAG.getConstant(IsROTL ? RevAmt : Amt, dl, Op1.getValueType()); in SimplifyDemandedBits()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 6859 auto RevAmt = MIRBuilder.buildAnd(AmtTy, NegAmt, BitWidthMinusOneC); in lowerRotate() local
6861 MIRBuilder.buildInstr(RevShiftOpc, {DstTy}, {Src, RevAmt}).getReg(0); in lowerRotate()
6868 auto RevAmt = MIRBuilder.buildSub(AmtTy, BitWidthMinusOneC, ShAmt); in lowerRotate() local
6872 MIRBuilder.buildInstr(RevShiftOpc, {DstTy}, {Inner, RevAmt}).getReg(0); in lowerRotate()
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