/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | RuntimeLibcallUtil.h | 31 Libcall getFPEXT(EVT OpVT, EVT RetVT); 35 Libcall getFPROUND(EVT OpVT, EVT RetVT); 39 Libcall getFPTOSINT(EVT OpVT, EVT RetVT); 43 Libcall getFPTOUINT(EVT OpVT, EVT RetVT); 47 Libcall getSINTTOFP(EVT OpVT, EVT RetVT); 51 Libcall getUINTTOFP(EVT OpVT, EVT RetVT); 55 Libcall getPOWI(EVT RetVT); 59 Libcall getLDEXP(EVT RetVT); 63 Libcall getFREXP(EVT RetVT);
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H A D | FastISel.h | 354 virtual unsigned fastEmit_(MVT VT, MVT RetVT, unsigned Opcode); 358 virtual unsigned fastEmit_r(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0); 362 virtual unsigned fastEmit_rr(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, 368 virtual unsigned fastEmit_ri(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, 381 virtual unsigned fastEmit_i(MVT VT, MVT RetVT, unsigned Opcode, uint64_t Imm); 386 virtual unsigned fastEmit_f(MVT VT, MVT RetVT, unsigned Opcode, 442 Register fastEmitInst_extractsubreg(MVT RetVT, unsigned Op0, uint32_t Idx);
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H A D | TargetLowering.h | 3910 EVT RetVT, ArrayRef<SDValue> Ops, 4727 MakeLibCallOptions &setTypeListBeforeSoften(ArrayRef<EVT> OpsVT, EVT RetVT, 4730 RetVTBeforeSoften = RetVT;
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | TargetLoweringBase.cpp | 120 RTLIB::Libcall RTLIB::getFPEXT(EVT OpVT, EVT RetVT) { in getFPEXT() argument 122 if (RetVT == MVT::f32) in getFPEXT() 124 if (RetVT == MVT::f64) in getFPEXT() 126 if (RetVT == MVT::f80) in getFPEXT() 128 if (RetVT == MVT::f128) in getFPEXT() 131 if (RetVT == MVT::f64) in getFPEXT() 133 if (RetVT == MVT::f128) in getFPEXT() 135 if (RetVT == MVT::ppcf128) in getFPEXT() 138 if (RetVT == MVT::f128) in getFPEXT() 140 else if (RetVT == MVT::ppcf128) in getFPEXT() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 199 bool optimizeIntExtLoad(const Instruction *I, MVT RetVT, MVT SrcVT); 204 unsigned emitAddSub(bool UseAdd, MVT RetVT, const Value *LHS, 207 unsigned emitAddSub_rr(bool UseAdd, MVT RetVT, unsigned LHSReg, 210 unsigned emitAddSub_ri(bool UseAdd, MVT RetVT, unsigned LHSReg, 213 unsigned emitAddSub_rs(bool UseAdd, MVT RetVT, unsigned LHSReg, 217 unsigned emitAddSub_rx(bool UseAdd, MVT RetVT, unsigned LHSReg, 225 bool emitICmp(MVT RetVT, const Value *LHS, const Value *RHS, bool IsZExt); 226 bool emitICmp_ri(MVT RetVT, unsigned LHSReg, uint64_t Imm); 227 bool emitFCmp(MVT RetVT, const Value *LHS, const Value *RHS); 236 unsigned emitAdd(MVT RetVT, const Value *LHS, const Value *RHS, [all …]
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H A D | AArch64TargetTransformInfo.cpp | 841 EVT RetVT = getTLI()->getValueType(DL, RetTy); in getIntrinsicInstrCost() local 843 if (!getTLI()->shouldExpandGetActiveLaneMask(RetVT, OpVT) && in getIntrinsicInstrCost() 844 !getTLI()->isTypeLegal(RetVT)) { in getIntrinsicInstrCost()
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H A D | AArch64ISelLowering.cpp | 24615 const EVT RetVT = N->getValueType(0); in performGatherLoadCombine() local 24616 assert(RetVT.isScalableVector() && in performGatherLoadCombine() 24622 if (RetVT.getSizeInBits().getKnownMinValue() > AArch64::SVEBitsPerBlock) in performGatherLoadCombine() 24637 RetVT.getScalarSizeInBits()); in performGatherLoadCombine() 24641 RetVT.getScalarSizeInBits()); in performGatherLoadCombine() 24664 RetVT.getScalarSizeInBits() / 8)) { in performGatherLoadCombine() 24690 EVT HwRetVt = getSVEContainerType(RetVT); in performGatherLoadCombine() 24695 SDValue OutVT = DAG.getValueType(RetVT); in performGatherLoadCombine() 24696 if (RetVT.isFloatingPoint()) in performGatherLoadCombine() 24707 if (RetVT.isInteger() && (RetVT != HwRetVt)) in performGatherLoadCombine() [all …]
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/freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
H A D | FastISelEmitter.cpp | 529 MVT::SimpleValueType RetVT = MVT::isVoid; in collectPatterns() local 531 RetVT = InstPatNode.getSimpleType(0); in collectPatterns() 532 MVT::SimpleValueType VT = RetVT; in collectPatterns() 598 std::tuple(Operands, OpcodeName, VT, RetVT, PredicateCheck)); in collectPatterns() 606 SimplePatterns[Operands][OpcodeName][VT][RetVT].emplace(complexity, in collectPatterns() 716 MVT::SimpleValueType RetVT = RI.first; in printFunctionDefinitions() local 721 << getLegalCName(std::string(getName(RetVT))) << "_"; in printFunctionDefinitions() 727 emitInstructionCode(OS, Operands, PM, std::string(getName(RetVT))); in printFunctionDefinitions() 740 MVT::SimpleValueType RetVT = RI.first; in printFunctionDefinitions() local 741 OS << " case " << getName(RetVT) << ": return fastEmit_" in printFunctionDefinitions() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCFastISel.cpp | 191 bool finishCall(MVT RetVT, CallLoweringInfo &CLI, unsigned &NumBytes); 1487 bool PPCFastISel::finishCall(MVT RetVT, CallLoweringInfo &CLI, unsigned &NumBytes) { in finishCall() argument 1498 if (RetVT != MVT::isVoid) { in finishCall() 1501 CCInfo.AnalyzeCallResult(RetVT, RetCC_PPC64_ELF_FIS); in finishCall() 1511 if (RetVT == MVT::i8 || RetVT == MVT::i16 || RetVT == MVT::i32) in finishCall() 1517 if (RetVT == CopyVT) { in finishCall() 1523 ResultReg = createResultReg(TLI.getRegClassFor(RetVT)); in finishCall() 1531 } else if (RetVT == MVT::i8 || RetVT == MVT::i16 || RetVT == MVT::i32) { in finishCall() 1571 MVT RetVT; in fastLowerCall() local 1573 RetVT = MVT::isVoid; in fastLowerCall() [all …]
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H A D | PPCISelLowering.cpp | 18494 EVT RetVT = Op.getValueType(); in lowerToLibCall() local 18495 Type *RetTy = RetVT.getTypeForEVT(*DAG.getContext()); in lowerToLibCall() 18498 bool SignExtend = TLI.shouldSignExtendTypeInLibCall(RetVT, false); in lowerToLibCall()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMFastISel.cpp | 225 bool FinishCall(MVT RetVT, SmallVectorImpl<Register> &UsedRegs, 2021 bool ARMFastISel::FinishCall(MVT RetVT, SmallVectorImpl<Register> &UsedRegs, in FinishCall() argument 2031 if (RetVT != MVT::isVoid) { in FinishCall() 2034 CCInfo.AnalyzeCallResult(RetVT, CCAssignFnForCall(CC, true, isVarArg)); in FinishCall() 2037 if (RVLocs.size() == 2 && RetVT == MVT::f64) { in FinishCall() 2058 if (RetVT == MVT::i1 || RetVT == MVT::i8 || RetVT == MVT::i16) in FinishCall() 2207 MVT RetVT; in ARMEmitLibcall() local 2209 RetVT = MVT::isVoid; in ARMEmitLibcall() 2210 else if (!isTypeLegal(RetTy, RetVT)) in ARMEmitLibcall() 2214 if (RetVT != MVT::isVoid && RetVT != MVT::i32) { in ARMEmitLibcall() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86FastISel.cpp | 110 bool X86FastEmitCMoveSelect(MVT RetVT, const Instruction *I); 112 bool X86FastEmitSSESelect(MVT RetVT, const Instruction *I); 114 bool X86FastEmitPseudoSelect(MVT RetVT, const Instruction *I); 235 MVT RetVT; in foldX86XALUIntrinsic() local 239 if (!isTypeLegal(RetTy, RetVT)) in foldX86XALUIntrinsic() 242 if (RetVT != MVT::i32 && RetVT != MVT::i64) in foldX86XALUIntrinsic() 2024 bool X86FastISel::X86FastEmitCMoveSelect(MVT RetVT, const Instruction *I) { in X86FastEmitCMoveSelect() argument 2030 if (RetVT < MVT::i16 || RetVT > MVT::i64) in X86FastEmitCMoveSelect() 2034 const TargetRegisterClass *RC = TLI.getRegClassFor(RetVT); in X86FastEmitCMoveSelect() 2150 bool X86FastISel::X86FastEmitSSESelect(MVT RetVT, const Instruction *I) { in X86FastEmitSSESelect() argument [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsFastISel.cpp | 197 unsigned emitLogicalOp(unsigned ISDOpc, MVT RetVT, const Value *LHS, 242 bool finishCall(CallLoweringInfo &CLI, MVT RetVT, unsigned NumBytes); 291 unsigned MipsFastISel::emitLogicalOp(unsigned ISDOpc, MVT RetVT, in emitLogicalOp() argument 1270 bool MipsFastISel::finishCall(CallLoweringInfo &CLI, MVT RetVT, in finishCall() argument 1274 if (RetVT != MVT::isVoid) { in finishCall() 1288 if (RetVT == MVT::i1 || RetVT == MVT::i8 || RetVT == MVT::i16) in finishCall() 1506 MVT RetVT; in fastLowerCall() local 1508 RetVT = MVT::isVoid; in fastLowerCall() 1509 else if (!isTypeSupported(CLI.RetTy, RetVT)) in fastLowerCall() 1577 return finishCall(CLI, RetVT, NumBytes); in fastLowerCall() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeFloatTypes.cpp | 1119 static RTLIB::Libcall findFPToIntLibcall(EVT SrcVT, EVT RetVT, EVT &Promoted, in findFPToIntLibcall() argument 1127 if (Promoted.bitsGE(RetVT)) in findFPToIntLibcall() 2300 EVT RetVT = N->getOperand(0).getValueType(); in ExpandFloatOp_LROUND() local 2302 return TLI.makeLibCall(DAG, GetFPLibCall(RetVT, in ExpandFloatOp_LROUND() 2313 EVT RetVT = N->getOperand(0).getValueType(); in ExpandFloatOp_LLROUND() local 2315 return TLI.makeLibCall(DAG, GetFPLibCall(RetVT, in ExpandFloatOp_LLROUND() 2326 EVT RetVT = N->getOperand(0).getValueType(); in ExpandFloatOp_LRINT() local 2328 return TLI.makeLibCall(DAG, GetFPLibCall(RetVT, in ExpandFloatOp_LRINT() 2339 EVT RetVT = N->getOperand(0).getValueType(); in ExpandFloatOp_LLRINT() local 2341 return TLI.makeLibCall(DAG, GetFPLibCall(RetVT, in ExpandFloatOp_LLRINT() [all …]
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H A D | LegalizeDAG.cpp | 2075 EVT RetVT = Node->getValueType(0); in ExpandLibCall() local 2076 Type *RetTy = RetVT.getTypeForEVT(*DAG.getContext()); in ExpandLibCall() 2095 bool signExtend = TLI.shouldSignExtendTypeInLibCall(RetVT, isSigned); in ExpandLibCall() 2182 EVT RetVT = Node->getValueType(0); in ExpandFPLibCall() local 2186 std::pair<SDValue, SDValue> Tmp = TLI.makeLibCall(DAG, LC, RetVT, in ExpandFPLibCall() 2269 EVT RetVT = Node->getValueType(0); in ExpandDivRemLibCall() local 2270 Type *RetTy = RetVT.getTypeForEVT(*DAG.getContext()); in ExpandDivRemLibCall() 2285 SDValue FIPtr = DAG.CreateStackTemporary(RetVT); in ExpandDivRemLibCall() 2308 DAG.getLoad(RetVT, dl, CallInfo.second, FIPtr, MachinePointerInfo()); in ExpandDivRemLibCall() 2362 EVT RetVT = Node->getValueType(0); in ExpandSinCosLibCall() local [all …]
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H A D | FastISel.cpp | 2233 Register FastISel::fastEmitInst_extractsubreg(MVT RetVT, unsigned Op0, in fastEmitInst_extractsubreg() argument 2235 Register ResultReg = createResultReg(TLI.getRegClassFor(RetVT)); in fastEmitInst_extractsubreg()
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H A D | TargetLowering.cpp | 146 TargetLowering::makeLibCall(SelectionDAG &DAG, RTLIB::Libcall LC, EVT RetVT, in makeLibCall() argument 178 Type *RetTy = RetVT.getTypeForEVT(*DAG.getContext()); in makeLibCall() 180 bool signExtend = shouldSignExtendTypeInLibCall(RetVT, CallOptions.IsSExt); in makeLibCall() 404 EVT RetVT = getCmpLibcallReturnType(); in softenSetCCOperands() local 409 CallOptions.setTypeListBeforeSoften(OpsVT, RetVT, true); in softenSetCCOperands() 410 auto Call = makeLibCall(DAG, LC1, RetVT, Ops, CallOptions, dl, Chain); in softenSetCCOperands() 412 NewRHS = DAG.getConstant(0, dl, RetVT); in softenSetCCOperands() 416 assert(RetVT.isInteger()); in softenSetCCOperands() 417 CCCode = getSetCCInverse(CCCode, RetVT); in softenSetCCOperands() 425 getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), RetVT); in softenSetCCOperands() [all …]
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H A D | LegalizeVectorTypes.cpp | 7303 EVT RetVT = WidenEltVT; in findMemType() local 7305 return RetVT; in findMemType() 7324 RetVT = MemVT; in findMemType() 7345 if (RetVT.getFixedSizeInBits() < MemVTWidth || MemVT == WidenVT) in findMemType() 7355 return RetVT; in findMemType()
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H A D | LegalizeIntegerTypes.cpp | 2962 EVT RetVT = Node->getValueType(0); in ExpandAtomic() local 2974 return TLI.makeLibCall(DAG, LC, RetVT, Ops, CallOptions, SDLoc(Node), in ExpandAtomic() 4031 EVT RetVT = N->getValueType(0); in ExpandIntRes_XROUND_XRINT() local 4035 std::pair<SDValue, SDValue> Tmp = TLI.makeLibCall(DAG, LC, RetVT, in ExpandIntRes_XROUND_XRINT()
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H A D | SelectionDAGBuilder.cpp | 6855 EVT RetVT = TLI.getValueType(DAG.getDataLayout(), I.getType()); in visitIntrinsicCall() local 6856 setValue(&I, DAG.getNode(Opcode, sdl, RetVT, in visitIntrinsicCall() 10812 EVT RetVT = OldRetTys[i]; in LowerCallTo() local 10814 MVT RegisterVT = getRegisterType(CLI.RetTy->getContext(), RetVT); in LowerCallTo() 10815 unsigned NumRegs = getNumRegisters(CLI.RetTy->getContext(), RetVT); in LowerCallTo()
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/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyFastISel.cpp | 1164 EVT RetVT = TLI.getValueType(DL, I->getType()); in selectBitCast() local 1165 if (!VT.isSimple() || !RetVT.isSimple()) in selectBitCast() 1172 if (VT == RetVT) { in selectBitCast() 1178 Register Reg = fastEmit_ISD_BITCAST_r(VT.getSimpleVT(), RetVT.getSimpleVT(), in selectBitCast()
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/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.h | 608 EVT RetVT, ArrayRef<SDValue> Ops, CallingConv::ID CallConv,
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H A D | SystemZISelLowering.cpp | 2119 SDValue Chain, SelectionDAG &DAG, const char *CalleeName, EVT RetVT, in makeExternalCall() argument 2137 Type *RetTy = RetVT.getTypeForEVT(*DAG.getContext()); in makeExternalCall() 2139 bool SignExtend = shouldSignExtendTypeInLibCall(RetVT, IsSigned); in makeExternalCall()
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/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
H A D | LoongArchISelLowering.cpp | 1603 EVT RetVT = Op.getValueType(); in lowerUINT_TO_FP() local 1604 RTLIB::Libcall LC = RTLIB::getUINTTOFP(OpVT, RetVT); in lowerUINT_TO_FP() 1606 CallOptions.setTypeListBeforeSoften(OpVT, RetVT, true); in lowerUINT_TO_FP() 1628 EVT RetVT = Op.getValueType(); in lowerSINT_TO_FP() local 1629 RTLIB::Libcall LC = RTLIB::getSINTTOFP(OpVT, RetVT); in lowerSINT_TO_FP() 1631 CallOptions.setTypeListBeforeSoften(OpVT, RetVT, true); in lowerSINT_TO_FP()
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 9331 MVT RetVT = VT; in LowerINTRINSIC_WO_CHAIN() local 9333 RetVT = getContainerForFixedLengthVector(VT); in LowerINTRINSIC_WO_CHAIN() 9335 RetVT = MVT::getVectorVT(MVT::getIntegerVT(VT.getScalarSizeInBits()), in LowerINTRINSIC_WO_CHAIN() 9338 SDValue NewNode = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, RetVT, Operands); in LowerINTRINSIC_WO_CHAIN() 9364 MVT RetVT = VT; in getVCIXISDNodeWCHAIN() local 9368 RetVT = MVT::getVectorVT(MVT::getIntegerVT(VT.getScalarSizeInBits()), in getVCIXISDNodeWCHAIN() 9370 FloatVT = RetVT; in getVCIXISDNodeWCHAIN() 9373 RetVT = getContainerForFixedLengthVector(DAG.getTargetLoweringInfo(), RetVT, in getVCIXISDNodeWCHAIN() 9378 SDVTList VTs = DAG.getVTList({RetVT, MVT::Other}); in getVCIXISDNodeWCHAIN()
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