/freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | ValueTypes.cpp | 47 EVT ResultVT; in getExtendedVectorVT() local 48 ResultVT.LLVMTy = in getExtendedVectorVT() 50 assert(ResultVT.isExtended() && "Type is not extended!"); in getExtendedVectorVT() 51 return ResultVT; in getExtendedVectorVT() 55 EVT ResultVT; in getExtendedVectorVT() local 56 ResultVT.LLVMTy = VectorType::get(VT.getTypeForEVT(Context), EC); in getExtendedVectorVT() 57 assert(ResultVT.isExtended() && "Type is not extended!"); in getExtendedVectorVT() 58 return ResultVT; in getExtendedVectorVT()
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/freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
H A D | VECustomDAG.cpp | 422 SDValue VECustomDAG::getMaskBroadcast(EVT ResultVT, SDValue Scalar, in getMaskBroadcast() argument 426 return getConstantMask(getTypePacking(ResultVT), in getMaskBroadcast() 435 unsigned ElemCount = ResultVT.getVectorNumElements(); in getMaskBroadcast() 451 SDValue VECustomDAG::getBroadcast(EVT ResultVT, SDValue Scalar, in getBroadcast() argument 453 assert(ResultVT.isVector()); in getBroadcast() 456 if (isMaskType(ResultVT)) in getBroadcast() 457 return getMaskBroadcast(ResultVT, Scalar, AVL); in getBroadcast() 459 if (isPackedVectorType(ResultVT)) { in getBroadcast() 471 return getNode(VEISD::VEC_BROADCAST, ResultVT, {Scalar, AVL}); in getBroadcast()
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H A D | VECustomDAG.h | 202 SDValue getMaskBroadcast(EVT ResultVT, SDValue Scalar, SDValue AVL) const; 203 SDValue getBroadcast(EVT ResultVT, SDValue Scalar, SDValue AVL) const;
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H A D | VEISelLowering.cpp | 1831 MVT ResultVT = Op.getSimpleValueType(); in lowerBUILD_VECTOR() local 1839 return CDAG.getNode(ISD::INSERT_VECTOR_ELT, ResultVT, {AccuV, ElemV, IdxV}); in lowerBUILD_VECTOR() 1844 unsigned NumEls = ResultVT.getVectorNumElements(); in lowerBUILD_VECTOR() 1846 return CDAG.getBroadcast(ResultVT, ScalarV, AVL); in lowerBUILD_VECTOR()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeTypes.cpp | 246 EVT ResultVT = N->getValueType(i); in run() local 247 LLVM_DEBUG(dbgs() << "Analyzing result type: " << ResultVT << "\n"); in run() 248 switch (getTypeAction(ResultVT)) { in run()
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H A D | TargetLowering.cpp | 8558 SDValue TargetLowering::expandIS_FPCLASS(EVT ResultVT, SDValue Op, in expandIS_FPCLASS() argument 8567 return DAG.getBoolConstant(false, DL, ResultVT, OperandVT); in expandIS_FPCLASS() 8569 return DAG.getBoolConstant(true, DL, ResultVT, OperandVT); in expandIS_FPCLASS() 8608 return DAG.getSetCC(DL, ResultVT, Op, in expandIS_FPCLASS() 8616 return DAG.getSetCC(DL, ResultVT, Op, Op, in expandIS_FPCLASS() 8628 return DAG.getSetCC(DL, ResultVT, Abs, Inf, in expandIS_FPCLASS() 8652 APInt InvertionMask = APInt::getAllOnes(ResultVT.getScalarSizeInBits()); in expandIS_FPCLASS() 8659 SDValue ResultInvertionMask = DAG.getConstant(InvertionMask, DL, ResultVT); in expandIS_FPCLASS() 8665 Res = DAG.getNode(ISD::OR, DL, ResultVT, Res, PartialRes); in expandIS_FPCLASS() 8678 IntBitIsSetV = DAG.getSetCC(DL, ResultVT, IntBitV, ZeroV, ISD::SETNE); in expandIS_FPCLASS() [all …]
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H A D | SelectionDAGBuilder.cpp | 7500 EVT ResultVT = Op1.getValueType(); in visitIntrinsicCall() local 7502 if (ResultVT.isVector()) in visitIntrinsicCall() 7504 *Context, OverflowVT, ResultVT.getVectorElementCount()); in visitIntrinsicCall() 7506 SDVTList VTs = DAG.getVTList(ResultVT, OverflowVT); in visitIntrinsicCall() 8080 EVT ResultVT = TLI.getValueType(DAG.getDataLayout(), I.getType()); in visitIntrinsicCall() local 8081 setValue(&I, DAG.getNode(ISD::INSERT_SUBVECTOR, sdl, ResultVT, Vec, SubVec, in visitIntrinsicCall() 8088 EVT ResultVT = TLI.getValueType(DAG.getDataLayout(), I.getType()); in visitIntrinsicCall() local 8097 DAG.getNode(ISD::EXTRACT_SUBVECTOR, sdl, ResultVT, Vec, Index)); in visitIntrinsicCall() 10221 EVT ResultVT = TLI.getValueType(DAG.getDataLayout(), *CurResultType); in visitInlineAsm() local 10233 if (ResultVT != V.getValueType() && in visitInlineAsm() [all …]
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H A D | LegalizeVectorTypes.cpp | 705 EVT ResultVT = N->getValueType(0).getVectorElementType(); in ScalarizeVecRes_IS_FPCLASS() local 721 return DAG.getNode(ExtendCode, DL, ResultVT, Res); in ScalarizeVecRes_IS_FPCLASS() 6590 EVT ResultVT = N->getValueType(0); in WidenVecOp_IS_FPCLASS() local 6596 if (ResultVT.getScalarType() == MVT::i1) in WidenVecOp_IS_FPCLASS() 6606 ResultVT.getVectorNumElements()); in WidenVecOp_IS_FPCLASS() 6613 return DAG.getNode(ExtendCode, DL, ResultVT, CC); in WidenVecOp_IS_FPCLASS()
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H A D | DAGCombiner.cpp | 22284 EVT ResultVT = EVE->getValueType(0); in scalarizeExtractedVectorLoad() local 22294 ResultVT.bitsGT(VecEltVT) ? ISD::NON_EXTLOAD : ISD::EXTLOAD; in scalarizeExtractedVectorLoad() 22328 if (ResultVT.bitsGT(VecEltVT)) { in scalarizeExtractedVectorLoad() 22332 TLI.isLoadExtLegal(ISD::ZEXTLOAD, ResultVT, VecEltVT) ? ISD::ZEXTLOAD in scalarizeExtractedVectorLoad() 22334 Load = DAG.getExtLoad(ExtType, DL, ResultVT, OriginalLoad->getChain(), in scalarizeExtractedVectorLoad() 22345 if (ResultVT.bitsLT(VecEltVT)) in scalarizeExtractedVectorLoad() 22346 Load = DAG.getNode(ISD::TRUNCATE, DL, ResultVT, Load); in scalarizeExtractedVectorLoad() 22348 Load = DAG.getBitcast(ResultVT, Load); in scalarizeExtractedVectorLoad()
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/freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
H A D | DAGISelMatcherGen.cpp | 691 MVT::SimpleValueType ResultVT = N.getSimpleType(0); in EmitResultLeafAsOperand() local 695 AddMatcher(new EmitNodeMatcher(II, ResultVT, std::nullopt, false, false, in EmitResultLeafAsOperand()
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/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyISelLowering.cpp | 2701 EVT ResultVT = EVT::getVectorVT(*DAG.getContext(), ElVT, in extractSubVector() local 2714 return DAG.getBuildVector(ResultVT, DL, in extractSubVector() 2718 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, ResultVT, Vec, VecIdx); in extractSubVector()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIISelLowering.cpp | 7280 EVT ResultVT = Op.getValueType(); in lowerEXTRACT_VECTOR_ELT() local 7371 if (ResultVT == MVT::f16 || ResultVT == MVT::bf16) { in lowerEXTRACT_VECTOR_ELT() 7373 return DAG.getNode(ISD::BITCAST, SL, ResultVT, Result); in lowerEXTRACT_VECTOR_ELT() 7376 return DAG.getAnyExtOrTrunc(Elt, SL, ResultVT); in lowerEXTRACT_VECTOR_ELT() 7387 EVT ResultVT = Op.getValueType(); in lowerVECTOR_SHUFFLE() local 7390 EVT PackVT = ResultVT.isInteger() ? MVT::v2i16 : MVT::v2f16; in lowerVECTOR_SHUFFLE() 7405 for (int I = 0, N = ResultVT.getVectorNumElements(); I != N; I += 2) { in lowerVECTOR_SHUFFLE() 7433 return DAG.getNode(ISD::CONCAT_VECTORS, SL, ResultVT, Pieces); in lowerVECTOR_SHUFFLE() 7439 EVT ResultVT = Op.getValueType(); in lowerSCALAR_TO_VECTOR() local 7446 for (int I = 1, E = ResultVT.getVectorNumElements(); I < E; ++I) in lowerSCALAR_TO_VECTOR() [all …]
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H A D | AMDGPUISelLowering.cpp | 3121 auto ResultVT = Op.getValueType(); in lowerCTLZResults() local 3123 if (ResultVT != MVT::i8 && ResultVT != MVT::i16) in lowerCTLZResults() 3127 assert(ResultVT == Arg.getValueType()); in lowerCTLZResults() 3129 const uint64_t NumBits = ResultVT.getFixedSizeInBits(); in lowerCTLZResults() 3143 return DAG.getNode(ISD::TRUNCATE, SL, ResultVT, NewOp); in lowerCTLZResults()
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | TargetLowering.h | 5283 SDValue expandRoundInexactToOdd(EVT ResultVT, SDValue Op, const SDLoc &DL, 5297 SDValue expandIS_FPCLASS(EVT ResultVT, SDValue Op, FPClassTest Test,
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 4880 MVT ResultVT = in getWideningInterleave() local 4883 if (ResultVT.isFixedLengthVector()) in getWideningInterleave() 4885 convertFromScalableVector(ResultVT, Interleaved, DAG, Subtarget); in getWideningInterleave() 8280 EVT ResultVT = EVT::getVectorVT(Context, SrcEltVT, Count); in lowerVectorTruncLike() local 8281 Result = DAG.getNode(RISCVISD::TRUNCATE_VECTOR_VL, DL, ResultVT, Result, in lowerVectorTruncLike() 14123 EVT ResultVT = EVT::getIntegerVT(C, ActiveBits).getRoundIntegerType(C); in narrowIndex() local 14124 if (ResultVT.bitsLT(VT.getVectorElementType())) { in narrowIndex() 14126 VT.changeVectorElementType(ResultVT), N); in narrowIndex()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 228 unsigned emitLoad(MVT VT, MVT ResultVT, Address Addr, bool WantZExt = true,
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H A D | AArch64ISelLowering.cpp | 22819 EVT ResultVT = MVT::getIntegerVT(std::max<unsigned>( in vectorToScalarBitmask() local 22821 return DAG.getNode(ISD::VECREDUCE_ADD, DL, ResultVT, RepresentativeBits); in vectorToScalarBitmask()
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/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 6065 MVT ResultVT = Op.getSimpleValueType(); in lowerIS_FPCLASS() local 6092 SDValue Intr = DAG.getNode(SystemZISD::TDC, DL, ResultVT, Arg, TDCMaskV); in lowerIS_FPCLASS()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 3919 EVT ResultVT = EVT::getVectorVT(*DAG.getContext(), ElVT, in extractSubVector() local 3932 return DAG.getBuildVector(ResultVT, dl, in extractSubVector() 3939 return DAG.getUNDEF(ResultVT); in extractSubVector() 3942 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, ResultVT, Vec, VecIdx); in extractSubVector() 3975 EVT ResultVT = Result.getValueType(); in insertSubVector() local 3986 return DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ResultVT, Result, Vec, VecIdx); in insertSubVector()
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