Searched refs:ResultRegs (Results 1 – 4 of 4) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 6619 SmallVector<Register, 5> ResultRegs(ResultNumRegs, Dst1Reg); in legalizeImageIntrinsic() local
6625 ResultRegs[0] = NewResultReg; in legalizeImageIntrinsic()
6629 ResultRegs[I] = MRI->createGenericVirtualRegister(RegTy); in legalizeImageIntrinsic()
6630 B.buildUnmerge(ResultRegs, NewResultReg); in legalizeImageIntrinsic()
6635 ResultRegs.resize(NumDataRegs); in legalizeImageIntrinsic()
6641 B.buildTrunc(DstReg, ResultRegs[0]); in legalizeImageIntrinsic()
6647 B.buildBitcast(DstReg, ResultRegs[0]); in legalizeImageIntrinsic()
6660 for (Register &Reg : ResultRegs) in legalizeImageIntrinsic()
6663 for (Register &Reg : ResultRegs) in legalizeImageIntrinsic()
6673 ResultRegs.push_back(Undef); in legalizeImageIntrinsic()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.cpp | 849 ArrayRef<Register> ResultRegs, in buildIntrinsic() argument
852 for (unsigned ResultReg : ResultRegs) in buildIntrinsic()
860 ArrayRef<Register> ResultRegs) { in buildIntrinsic() argument
864 return buildIntrinsic(ID, ResultRegs, HasSideEffects, isConvergent); in buildIntrinsic()
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| H A D | IRTranslator.cpp | 2746 ArrayRef<Register> ResultRegs; in translateCall() local
2748 ResultRegs = getOrCreateVRegs(CI); in translateCall()
2752 MachineInstrBuilder MIB = MIRBuilder.buildIntrinsic(ID, ResultRegs); in translateCall()
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| H A D | LegalizerHelper.cpp | 5327 Register ResultRegs[2]; in narrowScalarShift() local
5345 ResultRegs[0] = Lo.getReg(0); in narrowScalarShift()
5346 ResultRegs[1] = Hi.getReg(0); in narrowScalarShift()
5374 ResultRegs[0] = Lo.getReg(0); in narrowScalarShift()
5375 ResultRegs[1] = Hi.getReg(0); in narrowScalarShift()
5382 MIRBuilder.buildMergeLikeInstr(DstReg, ResultRegs); in narrowScalarShift()
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