Searched refs:ResultRegs (Results 1 – 4 of 4) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 6749 SmallVector<Register, 5> ResultRegs(ResultNumRegs, Dst1Reg); in legalizeImageIntrinsic() local
6755 ResultRegs[0] = NewResultReg; in legalizeImageIntrinsic()
6759 ResultRegs[I] = MRI->createGenericVirtualRegister(RegTy); in legalizeImageIntrinsic()
6760 B.buildUnmerge(ResultRegs, NewResultReg); in legalizeImageIntrinsic()
6765 ResultRegs.resize(NumDataRegs); in legalizeImageIntrinsic()
6771 B.buildTrunc(DstReg, ResultRegs[0]); in legalizeImageIntrinsic()
6777 B.buildBitcast(DstReg, ResultRegs[0]); in legalizeImageIntrinsic()
6790 for (Register &Reg : ResultRegs) in legalizeImageIntrinsic()
6793 for (Register &Reg : ResultRegs) in legalizeImageIntrinsic()
6803 ResultRegs.push_back(Undef); in legalizeImageIntrinsic()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.cpp | 873 ArrayRef<Register> ResultRegs, in buildIntrinsic() argument
876 for (Register ResultReg : ResultRegs) in buildIntrinsic()
884 ArrayRef<Register> ResultRegs) { in buildIntrinsic() argument
888 return buildIntrinsic(ID, ResultRegs, HasSideEffects, isConvergent); in buildIntrinsic()
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| H A D | IRTranslator.cpp | 2792 ArrayRef<Register> ResultRegs; in translateCall() local
2794 ResultRegs = getOrCreateVRegs(CI); in translateCall()
2798 MachineInstrBuilder MIB = MIRBuilder.buildIntrinsic(ID, ResultRegs); in translateCall()
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| H A D | LegalizerHelper.cpp | 6016 Register ResultRegs[2]; in narrowScalarShift() local
6034 ResultRegs[0] = Lo.getReg(0); in narrowScalarShift()
6035 ResultRegs[1] = Hi.getReg(0); in narrowScalarShift()
6063 ResultRegs[0] = Lo.getReg(0); in narrowScalarShift()
6064 ResultRegs[1] = Hi.getReg(0); in narrowScalarShift()
6071 MIRBuilder.buildMergeLikeInstr(DstReg, ResultRegs); in narrowScalarShift()
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