Searched refs:ResultReg2 (Results 1 – 2 of 2) sorted by relevance
3692 unsigned ResultReg1 = 0, ResultReg2 = 0, MulReg = 0; in fastLowerIntrinsicCall() local3781 ResultReg2 = fastEmitInst_rri(AArch64::CSINCWr, &AArch64::GPR32RegClass, in fastLowerIntrinsicCall()3784 (void)ResultReg2; in fastLowerIntrinsicCall()3785 assert((ResultReg1 + 1) == ResultReg2 && in fastLowerIntrinsicCall()5081 const Register ResultReg2 = createResultReg(&AArch64::GPR32RegClass); in selectAtomicCmpXchg() local5099 .addDef(ResultReg2) in selectAtomicCmpXchg()5104 assert((ResultReg1 + 1) == ResultReg2 && "Nonconsecutive result registers."); in selectAtomicCmpXchg()
2954 Register ResultReg2 = createResultReg(&X86::GR8RegClass); in fastLowerIntrinsicCall() local2955 assert((ResultReg+1) == ResultReg2 && "Nonconsecutive result registers."); in fastLowerIntrinsicCall()2957 ResultReg2).addImm(CondCode); in fastLowerIntrinsicCall()