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Searched refs:ResRC (Results 1 – 3 of 3) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVVPInstrPatternsVec.td598 RegisterClass ResRC, ValueType ResVT,
606 ResRC)>;
614 ResRC)>;
618 RegisterClass ResRC, ValueType ResVT,
620 defm: Reduce_GenericInt<VectorVT, ResRC, ResVT, "or", "VROR">;
621 defm: Reduce_GenericInt<VectorVT, ResRC, ResVT, "and", "VRAND">;
622 defm: Reduce_GenericInt<VectorVT, ResRC, ResVT, "xor", "VRXOR">;
623 defm: Reduce_GenericInt<VectorVT, ResRC, ResVT, "add", "VSUM"#SumSuffix>;
624 defm: Reduce_GenericInt<VectorVT, ResRC, ResVT, "smax", "VRMAX"#MinMaxSuffix>;
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp5055 const TargetRegisterClass *ResRC; in selectAtomicCmpXchg() local
5062 ResRC = &AArch64::GPR32RegClass; in selectAtomicCmpXchg()
5066 ResRC = &AArch64::GPR64RegClass; in selectAtomicCmpXchg()
5080 const Register ResultReg1 = createResultReg(ResRC); in selectAtomicCmpXchg()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp19450 const TargetRegisterClass *ResRC = in canMergeExpensiveCrossRegisterBankCopy() local
19455 if (ArgRC == ResRC || !TLI.isOperationLegal(ISD::LOAD, ResVT)) in canMergeExpensiveCrossRegisterBankCopy()
19463 if (!TRI || TRI->getCommonSubClass(ArgRC, ResRC)) in canMergeExpensiveCrossRegisterBankCopy()