| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 5665 SDValue ResHi, ResLo; in Select() local
5680 ResLo = SDValue(CNode, 1); in Select()
5703 ResLo = SDValue(CNode, 1); in Select()
5713 if (!ResLo) { in Select()
5715 ResLo = CurDAG->getCopyFromReg(CurDAG->getEntryNode(), dl, LoReg, in Select()
5717 InGlue = ResLo.getValue(2); in Select()
5719 ReplaceUses(SDValue(Node, 0), ResLo); in Select()
5720 LLVM_DEBUG(dbgs() << "=> "; ResLo.getNode()->dump(CurDAG); in Select()
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| H A D | X86ISelLowering.cpp | 47608 SDValue ResLo = in reduceVMULWidth() local
47610 ResLo = DAG.getBitcast(ResVT, ResLo); in reduceVMULWidth()
47619 return DAG.getNode(ISD::CONCAT_VECTORS, DL, VT, ResLo, ResHi); in reduceVMULWidth()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 3087 SDValue ResLo = DAG.getNode(ISD::VECTOR_DEINTERLEAVE, DL, in SplitVecRes_VECTOR_DEINTERLEAVE()
3092 SetSplitVector(SDValue(N, 0), ResLo.getValue(0), ResHi.getValue(0)); in SplitVecRes_VECTOR_INTERLEAVE()
3093 SetSplitVector(SDValue(N, 1), ResLo.getValue(1), ResHi.getValue(1)); in SplitVecRes_VECTOR_INTERLEAVE()
3385 SDValue ResLo =
3387 return DAG.getNode(Opc, dl, ResVT, {ResLo, Hi, MaskHi, EVLHi}, Flags); in SplitVecOp_UnaryOp()
4269 SDValue ResLo = DAG.getNode(ISD::VP_CTTZ_ELTS, DL, ResVT, Lo, MaskLo, EVLLo); in SplitVecOp_VP_CttzElements()
4271 DAG.getSetCC(DL, getSetCCResultType(ResVT), ResLo, VLo, ISD::SETNE); in SplitVecOp_VP_CttzElements()
4273 return DAG.getSelect(DL, ResVT, ResLoNotEVL, ResLo,
3083 SDValue ResLo = DAG.getNode(ISD::VECTOR_DEINTERLEAVE, DL, SplitVecRes_VECTOR_DEINTERLEAVE() local
3381 SDValue ResLo = SplitVecOp_VP_REDUCE() local
4265 SDValue ResLo = DAG.getNode(ISD::VP_CTTZ_ELTS, DL, ResVT, Lo, MaskLo, EVLLo); SplitVecOp_VP_CttzElements() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 1063 SDValue ResLo = CurDAG.getNode(MipsISD::MFLO, DL, MVT::i32, MAdd); in performMADD_MSUBCombine() local
1066 CurDAG.getNode(ISD::BUILD_PAIR, DL, MVT::i64, ResLo, ResHi); in performMADD_MSUBCombine()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 6201 SDValue ResLo = in SplitVectorReductionOp()
6205 {ResLo, Hi, MaskHi, EVLHi}, Op->getFlags()); in SplitVectorReductionOp()
10469 SDValue ResLo = DAG.getNode(ISD::VECTOR_DEINTERLEAVE, DL, in lowerVECTOR_DEINTERLEAVE()
10475 ResLo.getValue(0), ResHi.getValue(0)); in lowerVECTOR_DEINTERLEAVE()
10476 SDValue Odd = DAG.getNode(ISD::CONCAT_VECTORS, DL, VecVT, ResLo.getValue(1), in lowerVECTOR_DEINTERLEAVE()
10547 SDValue ResLo = DAG.getNode(ISD::VECTOR_INTERLEAVE, DL, in lowerVECTOR_INTERLEAVE()
10553 ResLo.getValue(0), ResLo.getValue(1)); in lowerVECTOR_INTERLEAVE()
6200 SDValue ResLo = SplitVectorReductionOp() local
10467 SDValue ResLo = DAG.getNode(ISD::VECTOR_DEINTERLEAVE, DL, lowerVECTOR_DEINTERLEAVE() local
10545 SDValue ResLo = DAG.getNode(ISD::VECTOR_INTERLEAVE, DL, lowerVECTOR_INTERLEAVE() local
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| /freebsd/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGBuiltin.cpp | 17488 Value *ResLo = Builder.CreateZExt( in EmitPPCBuiltinExpr() local
17493 return Builder.CreateOr(ResLo, ResHi); in EmitPPCBuiltinExpr()
|