Searched refs:RequiredAlign (Results 1 – 6 of 6) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVRegisterInfo.h | 78 MaybeAlign RequiredAlign) const;
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| H A D | RISCVRegisterInfo.cpp | 178 MaybeAlign RequiredAlign) const { in adjustReg()
232 const uint64_t Align = RequiredAlign.valueOrOne().value(); in adjustReg()
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| H A D | RISCVISelLowering.cpp | 21468 Align RequiredAlign(PreferredVT.getStoreSize()); in getOptimalMemOpType()
21470 RequiredAlign = std::min(RequiredAlign, Op.getDstAlign()); in getOptimalMemOpType()
21472 RequiredAlign = std::min(RequiredAlign, Op.getSrcAlign()); in getOptimalMemOpType()
21473 PreferredVT = MVT::getIntegerVT(RequiredAlign.value() * 8); in getOptimalMemOpType()
21465 Align RequiredAlign(PreferredVT.getStoreSize()); getOptimalMemOpType() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 3983 uint64_t RequiredAlign = std::max(AlignVal, StackAlign); in lowerDYNAMIC_STACKALLOC_XPLINK() local
3984 uint64_t ExtraAlignSpace = RequiredAlign - StackAlign; in lowerDYNAMIC_STACKALLOC_XPLINK()
4023 DAG.getConstant(~(RequiredAlign - 1), DL, PtrVT)); in lowerDYNAMIC_STACKALLOC_XPLINK()
4048 uint64_t RequiredAlign = std::max(AlignVal, StackAlign); in lowerDYNAMIC_STACKALLOC_ELF() local
4049 uint64_t ExtraAlignSpace = RequiredAlign - StackAlign; in lowerDYNAMIC_STACKALLOC_ELF()
4088 if (RequiredAlign > StackAlign) { in lowerDYNAMIC_STACKALLOC_ELF()
4094 DAG.getConstant(~(RequiredAlign - 1), DL, MVT::i64)); in lowerDYNAMIC_STACKALLOC_ELF()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 6811 static bool isGPRShadowAligned(MCPhysReg Reg, Align RequiredAlign) { in isGPRShadowAligned() argument
6812 assert(RequiredAlign.value() <= 16 && in isGPRShadowAligned()
6833 return RequiredAlign <= 8; in isGPRShadowAligned()
6838 return RequiredAlign <= 4; in isGPRShadowAligned()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 6804 Align RequiredAlign(VT.getSizeInBits() / 8); in LowerAsSplatVectorLoad() local
6809 if (!InferredAlign || *InferredAlign < RequiredAlign) { in LowerAsSplatVectorLoad()
6816 MFI.setObjectAlignment(FI, RequiredAlign); in LowerAsSplatVectorLoad()
6824 if ((Offset % RequiredAlign.value()) & 3) in LowerAsSplatVectorLoad()
6826 int64_t StartOffset = Offset & ~int64_t(RequiredAlign.value() - 1); in LowerAsSplatVectorLoad()
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