| /freebsd/contrib/llvm-project/lld/ELF/ |
| H A D | Target.h | 28 std::string toStr(Ctx &, RelType type); 34 virtual RelExpr getRelExpr(RelType type, const Symbol &s, 36 virtual RelType getDynRel(RelType type) const { return 0; } in getDynRel() 41 virtual int64_t getImplicitAddend(const uint8_t *buf, RelType type) const; 42 virtual int getTlsGdRelaxSkip(RelType type) const { return 1; } in getTlsGdRelaxSkip() 65 virtual bool usesOnlyLowPageBits(RelType type) const; 69 virtual bool needsThunk(RelExpr expr, RelType relocType, 87 virtual bool inBranchRange(RelType type, uint64_t src, 92 void relocateNoSym(uint8_t *loc, RelType type, uint64_t val) const { in relocateNoSym() 127 static constexpr RelType noneRel = 0; [all …]
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| H A D | Target.cpp | 40 std::string elf::toStr(Ctx &ctx, RelType type) { in toStr() 47 const ELFSyncStream &elf::operator<<(const ELFSyncStream &s, RelType type) { in operator <<() 120 int64_t TargetInfo::getImplicitAddend(const uint8_t *buf, RelType type) const { in getImplicitAddend() 125 bool TargetInfo::usesOnlyLowPageBits(RelType type) const { return false; } in usesOnlyLowPageBits() 127 bool TargetInfo::needsThunk(RelExpr expr, RelType type, const InputFile *file, in needsThunk() 139 bool TargetInfo::inBranchRange(RelType type, uint64_t src, uint64_t dst) const { in inBranchRange() 143 RelExpr TargetInfo::adjustTlsExpr(RelType type, RelExpr expr) const { in adjustTlsExpr() 147 RelExpr TargetInfo::adjustGotPcExpr(RelType type, int64_t addend, in adjustGotPcExpr()
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| /freebsd/contrib/llvm-project/llvm/lib/ExecutionEngine/RuntimeDyld/ |
| H A D | RuntimeDyldELF.cpp | 694 unsigned RelType = RelI->getType(); in resolveLoongArch64Branch() local 700 RelType, 0); in resolveLoongArch64Branch() 732 RelType, 0); in resolveLoongArch64Branch() 1401 return resolveRelocation(Section, RE.Offset, Value, RE.RelType, RE.Addend, in resolveRelocation() 1460 void RuntimeDyldELF::processSimpleRelocation(unsigned SectionID, uint64_t Offset, unsigned RelType,… in processSimpleRelocation() argument 1461 RelocationEntry RE(SectionID, Offset, RelType, Value.Addend, Value.Offset); in processSimpleRelocation() 1468 uint32_t RuntimeDyldELF::getMatchingLoRelocation(uint32_t RelType, in getMatchingLoRelocation() argument 1470 switch (RelType) { in getMatchingLoRelocation() 1552 unsigned RelType = RelI->getType(); in resolveAArch64Branch() local 1557 Section.getLoadAddressWithOffset(i->second), RelType, 0); in resolveAArch64Branch() [all …]
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| H A D | RuntimeDyldImpl.h | 40 #define UNIMPLEMENTED_RELOC(RelType) \ argument 41 case RelType: \ 42 return make_error<RuntimeDyldError>("Unimplemented relocation: " #RelType) 131 uint32_t RelType; variable 155 : Offset(offset), Addend(addend), SectionID(id), RelType(type), in RelocationEntry() 160 : Offset(offset), Addend(addend), SectionID(id), RelType(type), in RelocationEntry() 166 : Offset(offset), Addend(addend), SectionID(id), RelType(type), in RelocationEntry() 173 SectionID(id), RelType(type), Size(Size), IsPCRel(IsPCRel), in RelocationEntry() 184 SectionID(id), RelType(type), Size(Size), IsPCRel(IsPCRel), in RelocationEntry()
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| /freebsd/contrib/llvm-project/llvm/lib/ExecutionEngine/RuntimeDyld/Targets/ |
| H A D | RuntimeDyldMachOAArch64.h | 40 switch (RE.RelType) { in decodeAddend() 46 << getRelocName(RE.RelType); in decodeAddend() 58 << getRelocName(RE.RelType); in decodeAddend() 76 switch (RE.RelType) { in decodeAddend() 156 MachO::RelocationInfoType RelType, int64_t Addend) const { in encodeAddend() argument 158 switch (RelType) { in encodeAddend() 176 switch (RelType) { in encodeAddend() 307 if (RE.RelType == MachO::ARM64_RELOC_POINTER_TO_GOT) { in processRelocationRef() 333 if (RE.RelType == MachO::ARM64_RELOC_POINTER_TO_GOT) { in processRelocationRef() 341 if (RE.RelType == MachO::ARM64_RELOC_GOT_LOAD_PAGE21 || in processRelocationRef() [all …]
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| H A D | RuntimeDyldMachOARM.h | 66 switch (RE.RelType) { in decodeAddend() 108 uint32_t RelType = Obj.getAnyRelocationType(RelInfo); in processRelocationRef() local 133 if (RelType == MachO::ARM_RELOC_HALF_SECTDIFF) in processRelocationRef() 136 else if (RelType == MachO::GENERIC_RELOC_VANILLA) in processRelocationRef() 144 switch (RelType) { in processRelocationRef() 152 if (RelType > MachO::ARM_RELOC_HALF_SECTDIFF) in processRelocationRef() 154 Twine(RelType) + in processRelocationRef() 175 if (RE.RelType == MachO::ARM_THUMB_RELOC_BR22) in processRelocationRef() 180 (RE.RelType == MachO::ARM_THUMB_RELOC_BR22) ? 4 : 8); in processRelocationRef() 184 if (!Value.SymbolName && (RelType == MachO::ARM_RELOC_BR24 || in processRelocationRef() [all …]
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| H A D | RuntimeDyldCOFFX86_64.h | 91 switch (RE.RelType) { in resolveRelocation() 102 uint64_t Delta = 4 + (RE.RelType - COFF::IMAGE_REL_AMD64_REL32); in resolveRelocation() 152 uint64_t Offset, uint64_t RelType, uint64_t Addend, in generateRelocationStub() argument 185 const RelocationEntry RE(SectionID, Offset, RelType, Addend); in generateRelocationStub() 191 RelType = COFF::IMAGE_REL_AMD64_ADDR64; in generateRelocationStub() 193 return std::make_tuple(Offset, RelType, Addend); in generateRelocationStub() 215 uint64_t RelType = RelI->getType(); in processRelocationRef() local 244 switch (RelType) { in processRelocationRef() 257 std::tie(Offset, RelType, Addend) = generateRelocationStub( in processRelocationRef() 258 SectionID, TargetName, Offset, RelType, Addend, Stubs); in processRelocationRef() [all …]
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| H A D | RuntimeDyldCOFFI386.h | 58 uint64_t RelType = RelI->getType(); in processRelocationRef() local 74 if (RelType != COFF::IMAGE_REL_I386_SECTION) in processRelocationRef() 84 switch (RelType) { in processRelocationRef() 101 << " RelType: " << RelTypeName << " TargetName: " in processRelocationRef() 105 RelocationEntry RE(SectionID, Offset, RelType, 0, -1, 0, 0, 0, false, 0); in processRelocationRef() 109 switch (RelType) { in processRelocationRef() 117 RelocationEntry(SectionID, Offset, RelType, Addend, TargetSectionID, in processRelocationRef() 124 RelocationEntry(TargetSectionID, Offset, RelType, 0); in processRelocationRef() 130 RelocationEntry(SectionID, Offset, RelType, TargetOffset + Addend); in processRelocationRef() 146 switch (RE.RelType) { in resolveRelocation() [all...] |
| H A D | RuntimeDyldCOFFThumb.h | 101 uint64_t RelType = RelI->getType(); in processRelocationRef() local 110 switch (RelType) { in processRelocationRef() 143 if (RelType != COFF::IMAGE_REL_ARM_SECTION) in processRelocationRef() 148 RelocationEntry RE(SectionID, Offset, RelType, 0, -1, 0, 0, 0, false, 0); in processRelocationRef() 156 switch (RelType) { in processRelocationRef() 163 RelocationEntry(SectionID, Offset, RelType, Addend, TargetSectionID, in processRelocationRef() 170 RelocationEntry(SectionID, Offset, RelType, Addend, TargetSectionID, in processRelocationRef() 177 RelocationEntry(TargetSectionID, Offset, RelType, 0); in processRelocationRef() 183 RelocationEntry(SectionID, Offset, RelType, TargetOffset + Addend); in processRelocationRef() 189 RelocationEntry(SectionID, Offset, RelType, Addend, TargetSectionID, in processRelocationRef() [all …]
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| H A D | RuntimeDyldELFMips.cpp | 18 resolveMIPSO32Relocation(Section, RE.Offset, Value, RE.RelType, RE.Addend); in resolveRelocation() 20 resolveMIPSN32Relocation(Section, RE.Offset, Value, RE.RelType, RE.Addend, in resolveRelocation() 23 resolveMIPSN64Relocation(Section, RE.Offset, Value, RE.RelType, RE.Addend, in resolveRelocation() 34 Value = evaluateMIPS64Relocation(Section, RE.Offset, Value, RE.RelType, in evaluateRelocation() 46 RE.RelType); in applyRelocation() 283 uint32_t RelType = r_type; in resolveMIPSN64Relocation() local 285 RelType, Addend, in resolveMIPSN64Relocation() 288 RelType = r_type2; in resolveMIPSN64Relocation() 289 CalculatedValue = evaluateMIPS64Relocation(Section, Offset, 0, RelType, in resolveMIPSN64Relocation() 294 RelType = r_type3; in resolveMIPSN64Relocation() [all …]
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| H A D | RuntimeDyldCOFFAArch64.h | 113 uint64_t Offset, uint64_t RelType, uint64_t Addend, in generateRelocationStub() argument 140 const RelocationEntry RE(SectionID, Offset, RelType, Addend); in generateRelocationStub() 148 RelType = INTERNAL_REL_ARM64_LONG_BRANCH26; in generateRelocationStub() 150 return std::make_tuple(Offset, RelType, Addend); in generateRelocationStub() 174 uint64_t RelType = RelI->getType(); in processRelocationRef() local 204 switch (RelType) { in processRelocationRef() 216 std::tie(Offset, RelType, Addend) = generateRelocationStub( in processRelocationRef() 217 SectionID, TargetName, Offset, RelType, Addend, Stubs); in processRelocationRef() 260 RelocationEntry RE(SectionID, Offset, RelType, Addend); in processRelocationRef() 263 RelocationEntry RE(SectionID, Offset, RelType, TargetOffset + Addend); in processRelocationRef() [all …]
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| H A D | RuntimeDyldMachOI386.h | 41 uint32_t RelType = Obj.getAnyRelocationType(RelInfo); in processRelocationRef() local 44 if (RelType == MachO::GENERIC_RELOC_SECTDIFF || in processRelocationRef() 45 RelType == MachO::GENERIC_RELOC_LOCAL_SECTDIFF) in processRelocationRef() 48 else if (RelType == MachO::GENERIC_RELOC_VANILLA) in processRelocationRef() 51 "type: " + Twine(RelType)).str()); in processRelocationRef() 54 switch (RelType) { in processRelocationRef() 59 if (RelType > MachO::GENERIC_RELOC_TLV) in processRelocationRef() 61 Twine(RelType) + in processRelocationRef() 108 switch (RE.RelType) { in resolveRelocation()
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| H A D | RuntimeDyldMachOX86_64.h | 41 uint32_t RelType = Obj.getAnyRelocationType(RelInfo); in processRelocationRef() local 43 if (RelType == MachO::X86_64_RELOC_SUBTRACTOR) in processRelocationRef() 61 switch (RelType) { in processRelocationRef() 64 if (RelType > MachO::X86_64_RELOC_TLV) in processRelocationRef() 66 Twine(RelType) + in processRelocationRef() 71 if (RE.RelType == MachO::X86_64_RELOC_GOT || in processRelocationRef() 72 RE.RelType == MachO::X86_64_RELOC_GOT_LOAD) in processRelocationRef() 99 switch (RE.RelType) { in resolveRelocation()
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| /freebsd/contrib/llvm-project/lld/ELF/Arch/ |
| H A D | PPC.cpp | 28 RelExpr getRelExpr(RelType type, const Symbol &s, 30 RelType getDynRel(RelType type) const override; 31 int64_t getImplicitAddend(const uint8_t *buf, RelType type) const override; 43 bool needsThunk(RelExpr expr, RelType relocType, const InputFile *file, 47 bool inBranchRange(RelType type, uint64_t src, uint64_t dst) const override; 50 RelExpr adjustTlsExpr(RelType type, RelExpr expr) const override; 51 int getTlsGdRelaxSkip(RelType type) const override; 202 bool PPC::needsThunk(RelExpr expr, RelType type, const InputFile *file, in needsThunk() 215 bool PPC::inBranchRange(RelType type, uint64_t src, uint64_t dst) const { in inBranchRange() 222 RelExpr PPC::getRelExpr(RelType type, const Symbol &s, in getRelExpr() [all …]
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| H A D | AMDGPU.cpp | 35 RelExpr getRelExpr(RelType type, const Symbol &s, 37 RelType getDynRel(RelType type) const override; 38 int64_t getImplicitAddend(const uint8_t *buf, RelType type) const override; 179 RelExpr AMDGPU::getRelExpr(RelType type, const Symbol &s, in getRelExpr() 202 RelType AMDGPU::getDynRel(RelType type) const { in getDynRel() 208 int64_t AMDGPU::getImplicitAddend(const uint8_t *buf, RelType type) const { in getImplicitAddend()
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| H A D | SystemZ.cpp | 26 int getTlsGdRelaxSkip(RelType type) const override; 27 RelExpr getRelExpr(RelType type, const Symbol &s, 29 RelType getDynRel(RelType type) const override; 37 RelExpr adjustTlsExpr(RelType type, RelExpr expr) const override; 38 RelExpr adjustGotPcExpr(RelType type, int64_t addend, 43 int64_t getImplicitAddend(const uint8_t *buf, RelType type) const override; 82 RelExpr SystemZ::getRelExpr(RelType type, const Symbol &s, in getRelExpr() 234 int64_t SystemZ::getImplicitAddend(const uint8_t *buf, RelType type) const { in getImplicitAddend() 268 RelType SystemZ::getDynRel(RelType type) const { in getDynRel() 274 RelExpr SystemZ::adjustTlsExpr(RelType type, RelExpr expr) const { in adjustTlsExpr() [all …]
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| H A D | Hexagon.cpp | 36 RelExpr getRelExpr(RelType type, const Symbol &s, 38 RelType getDynRel(RelType type) const override; 39 int64_t getImplicitAddend(const uint8_t *buf, RelType type) const override; 40 bool needsThunk(RelExpr expr, RelType type, const InputFile *file, 43 bool inBranchRange(RelType type, uint64_t src, uint64_t dst) const override; 102 RelExpr Hexagon::getRelExpr(RelType type, const Symbol &s, in getRelExpr() 268 bool Hexagon::inBranchRange(RelType type, uint64_t src, uint64_t dst) const { in inBranchRange() 290 bool Hexagon::needsThunk(RelExpr expr, RelType type, const InputFile *file, in needsThunk() 448 RelType Hexagon::getDynRel(RelType type) const { in getDynRel() 454 int64_t Hexagon::getImplicitAddend(const uint8_t *buf, RelType type) const { in getImplicitAddend()
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| H A D | Mips.cpp | 26 RelExpr getRelExpr(RelType type, const Symbol &s, 28 int64_t getImplicitAddend(const uint8_t *buf, RelType type) const override; 29 RelType getDynRel(RelType type) const override; 34 bool needsThunk(RelExpr expr, RelType type, const InputFile *file, 39 bool usesOnlyLowPageBits(RelType type) const override; 75 RelExpr MIPS<ELFT>::getRelExpr(RelType type, const Symbol &s, in getRelExpr() 198 template <class ELFT> RelType MIPS<ELFT>::getDynRel(RelType type) const { in getDynRel() 359 bool MIPS<ELFT>::needsThunk(RelExpr expr, RelType type, const InputFile *file, in needsThunk() 383 int64_t MIPS<ELFT>::getImplicitAddend(const uint8_t *buf, RelType type) const { in getImplicitAddend() 508 static bool isBranchReloc(RelType type) { in isBranchReloc() [all …]
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| H A D | X86.cpp | 25 int getTlsGdRelaxSkip(RelType type) const override; 26 RelExpr getRelExpr(RelType type, const Symbol &s, 28 int64_t getImplicitAddend(const uint8_t *buf, RelType type) const override; 30 RelType getDynRel(RelType type) const override; 39 RelExpr adjustTlsExpr(RelType type, RelExpr expr) const override; 72 int X86::getTlsGdRelaxSkip(RelType type) const { in getTlsGdRelaxSkip() 77 RelExpr X86::getRelExpr(RelType type, const Symbol &s, in getRelExpr() 159 RelExpr X86::adjustTlsExpr(RelType type, RelExpr expr) const { in adjustTlsExpr() 186 RelType X86::getDynRel(RelType type) const { in getDynRel() 241 int64_t X86::getImplicitAddend(const uint8_t *buf, RelType type) const { in getImplicitAddend()
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| H A D | PPC64.cpp | 170 int getTlsGdRelaxSkip(RelType type) const override; 172 RelExpr getRelExpr(RelType type, const Symbol &s, 174 RelType getDynRel(RelType type) const override; 175 int64_t getImplicitAddend(const uint8_t *buf, RelType type) const override; 184 bool needsThunk(RelExpr expr, RelType type, const InputFile *file, 188 bool inBranchRange(RelType type, uint64_t src, uint64_t dst) const override; 189 RelExpr adjustTlsExpr(RelType type, RelExpr expr) const override; 190 RelExpr adjustGotPcExpr(RelType type, int64_t addend, 617 int PPC64::getTlsGdRelaxSkip(RelType type) const { in getTlsGdRelaxSkip() 993 RelExpr PPC64::getRelExpr(RelType type, const Symbol &s, in getRelExpr() [all …]
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| H A D | AArch64.cpp | 67 RelExpr getRelExpr(RelType type, const Symbol &s, 69 RelType getDynRel(RelType type) const override; 70 int64_t getImplicitAddend(const uint8_t *buf, RelType type) const override; 76 bool needsThunk(RelExpr expr, RelType type, const InputFile *file, 80 bool inBranchRange(RelType type, uint64_t src, uint64_t dst) const override; 81 bool usesOnlyLowPageBits(RelType type) const override; 84 RelExpr adjustTlsExpr(RelType type, RelExpr expr) const override; 134 RelExpr AArch64::getRelExpr(RelType type, const Symbol &s, in getRelExpr() 236 RelExpr AArch64::adjustTlsExpr(RelType type, RelExpr expr) const { in adjustTlsExpr() 245 bool AArch64::usesOnlyLowPageBits(RelType type) const { in usesOnlyLowPageBits() [all …]
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| H A D | AVR.cpp | 47 RelExpr getRelExpr(RelType type, const Symbol &s, 49 bool needsThunk(RelExpr expr, RelType type, const InputFile *file, 57 RelExpr AVR::getRelExpr(RelType type, const Symbol &s, in getRelExpr() 105 bool AVR::needsThunk(RelExpr expr, RelType type, const InputFile *file, in needsThunk()
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| H A D | X86_64.cpp | 30 int getTlsGdRelaxSkip(RelType type) const override; 31 RelExpr getRelExpr(RelType type, const Symbol &s, 33 RelType getDynRel(RelType type) const override; 42 int64_t getImplicitAddend(const uint8_t *buf, RelType type) const override; 45 RelExpr adjustGotPcExpr(RelType type, int64_t addend, 101 int X86_64::getTlsGdRelaxSkip(RelType type) const { in getTlsGdRelaxSkip() 364 RelExpr X86_64::getRelExpr(RelType type, const Symbol &s, in getRelExpr() 471 RelType X86_64::getDynRel(RelType type) const { in getDynRel() 804 int64_t X86_64::getImplicitAddend(const uint8_t *buf, RelType type) const { in getImplicitAddend() 959 RelExpr X86_64::adjustGotPcExpr(RelType type, int64_t addend, in adjustGotPcExpr()
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| H A D | MSP430.cpp | 34 RelExpr getRelExpr(RelType type, const Symbol &s, 46 RelExpr MSP430::getRelExpr(RelType type, const Symbol &s, in getRelExpr()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86ELFObjectWriter.cpp | 366 X86_32RelType RelType = RT32_NONE; in getRelocType() local 375 RelType = RT32_32; in getRelocType() 378 RelType = RT32_16; in getRelocType() 381 RelType = RT32_8; in getRelocType() 384 return getRelocType32(Fixup.getLoc(), Specifier, RelType, IsPCRel, Kind); in getRelocType()
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