Searched refs:RegisterMap (Results 1 – 2 of 2) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 2177 SmallDenseMap<Register, SmallVector<MachineInstr *>, 8> &RegisterMap);
2326 SmallDenseMap<Register, SmallVector<MachineInstr *>, 8> &RegisterMap) { in RescheduleOps() argument
2478 RegisterMap[Reg]; in RescheduleOps()
2512 SmallDenseMap<Register, SmallVector<MachineInstr *>, 8> &RegisterMap, in updateRegisterMapForDbgValueListAfterMove() argument
2516 auto RegIt = RegisterMap.find(Op.getReg()); in updateRegisterMapForDbgValueListAfterMove()
2517 if (RegIt == RegisterMap.end()) in updateRegisterMapForDbgValueListAfterMove()
2547 SmallDenseMap<Register, SmallVector<MachineInstr *>, 8> RegisterMap; in RescheduleLoadStoreInstrs() local
2609 RetVal |= RescheduleOps(MBB, Lds, Base, true, MI2LocMap, RegisterMap); in RescheduleLoadStoreInstrs()
2616 RetVal |= RescheduleOps(MBB, Sts, Base, false, MI2LocMap, RegisterMap); in RescheduleLoadStoreInstrs()
2785 auto RegIt = RegisterMap.find(Reg); in RescheduleLoadStoreInstrs()
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| /freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | AsmMatcherEmitter.cpp | 1278 std::map<Record *, RegisterSet> RegisterMap; in buildRegisterClasses() local
1301 RegisterMap.insert(std::pair(CGR.TheDef, ContainingSet)); in buildRegisterClasses()
1368 for (auto &It : RegisterMap) in buildRegisterClasses()
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