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Searched refs:RegUnits (Results 1 – 13 of 13) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DInterferenceCache.cpp97 RegUnits[i++].VirtTag = LIUArray[Unit].getTag(); in revalidate()
112 RegUnits.clear(); in reset()
114 RegUnits.push_back(LIUArray[Unit]); in reset()
115 RegUnits.back().Fixed = &LIS->getRegUnit(Unit); in reset()
121 unsigned i = 0, e = RegUnits.size(); in valid()
125 if (LIUArray[Unit].changedSince(RegUnits[i].VirtTag)) in valid()
139 for (RegUnitInfo &RUI : RegUnits) { in update()
144 for (RegUnitInfo &RUI : RegUnits) { in update()
163 for (RegUnitInfo &RUI : RegUnits) { in update()
175 for (RegUnitInfo &RUI : RegUnits) { in update()
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H A DMachineTraceMetrics.cpp718 SparseSet<LiveRegUnit> &RegUnits, in updatePhysDepsDownwards() argument
739 SparseSet<LiveRegUnit>::iterator I = RegUnits.find(Unit); in updatePhysDepsDownwards()
740 if (I == RegUnits.end()) in updatePhysDepsDownwards()
751 RegUnits.erase(Unit); in updatePhysDepsDownwards()
757 LiveRegUnit &LRU = RegUnits[Unit]; in updatePhysDepsDownwards()
796 SparseSet<LiveRegUnit> &RegUnits) { in updateDepth() argument
802 updatePhysDepsDownwards(&UseMI, Deps, RegUnits, MTM.TRI); in updateDepth()
835 SparseSet<LiveRegUnit> &RegUnits) { in updateDepth() argument
836 updateDepth(BlockInfo[MBB->getNumber()], UseMI, RegUnits); in updateDepth()
842 SparseSet<LiveRegUnit> &RegUnits) { in updateDepths() argument
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H A DMachineCombiner.cpp488 SparseSet<LiveRegUnit> &RegUnits, in insertDeleteInstructions() argument
506 for (auto *I = RegUnits.begin(); I != RegUnits.end();) { in insertDeleteInstructions()
508 I = RegUnits.erase(I); in insertDeleteInstructions()
516 TraceEnsemble->updateDepth(MBB, *InstrPtr, RegUnits); in insertDeleteInstructions()
571 SparseSet<LiveRegUnit> RegUnits; in combineInstructions() local
572 RegUnits.setUniverse(TRI->getNumRegUnits()); in combineInstructions()
641 TraceEnsemble->updateDepths(LastUpdate, BlockIter, RegUnits); in combineInstructions()
656 RegUnits, TII, P, IncrementalUpdate); in combineInstructions()
669 RegUnits, TII, P, IncrementalUpdate); in combineInstructions()
678 RegUnits, TII, P, IncrementalUpdate); in combineInstructions()
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H A DRegisterPressure.cpp370 static LaneBitmask getRegLanes(ArrayRef<RegisterMaskPair> RegUnits, in getRegLanes() argument
372 auto I = llvm::find_if(RegUnits, [RegUnit](const RegisterMaskPair Other) { in getRegLanes()
375 if (I == RegUnits.end()) in getRegLanes()
380 static void addRegLanes(SmallVectorImpl<RegisterMaskPair> &RegUnits, in addRegLanes() argument
384 auto I = llvm::find_if(RegUnits, [RegUnit](const RegisterMaskPair Other) { in addRegLanes()
387 if (I == RegUnits.end()) { in addRegLanes()
388 RegUnits.push_back(Pair); in addRegLanes()
394 static void setRegZero(SmallVectorImpl<RegisterMaskPair> &RegUnits, in setRegZero() argument
396 auto I = llvm::find_if(RegUnits, [RegUnit](const RegisterMaskPair Other) { in setRegZero()
399 if (I == RegUnits.end()) { in setRegZero()
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H A DInterferenceCache.h92 SmallVector<RegUnitInfo, 4> RegUnits; variable
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DLiveRegUnits.h144 void addUnits(const BitVector &RegUnits) { in addUnits() argument
145 Units |= RegUnits; in addUnits()
148 void removeUnits(const BitVector &RegUnits) { in removeUnits() argument
149 Units.reset(RegUnits); in removeUnits()
H A DRegisterScavenging.h186 setUsed(const BitVector & RegUnits) setUsed() argument
189 setUnused(const BitVector & RegUnits) setUnused() argument
H A DMachineTraceMetrics.h377 SparseSet<LiveRegUnit> &RegUnits);
379 SparseSet<LiveRegUnit> &RegUnits);
384 SparseSet<LiveRegUnit> &RegUnits);
/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/
H A DCodeGenRegisters.h257 const RegUnitList &getRegUnits() const { return RegUnits; } in getRegUnits()
276 void adoptRegUnit(unsigned RUID) { RegUnits.set(RUID); } in adoptRegUnit()
302 RegUnitList RegUnits; variable
472 std::vector<unsigned> &RegUnits) const;
603 SmallVector<RegUnit, 8> RegUnits; variable
737 RegUnit &RU = RegUnits.emplace_back();
743 return RegUnits.size() - 1;
749 RegUnit &RU = RegUnits.emplace_back(); in newRegUnit()
751 return RegUnits.size() - 1; in newRegUnit()
761 RegUnit &getRegUnit(unsigned RUID) { return RegUnits[RUID]; } in getRegUnit()
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H A DCodeGenRegisters.cpp269 changed |= (RegUnits |= SR->RegUnits); in inheritRegUnits()
426 RegUnits |= SR->RegUnits; in computeSubRegs()
446 RegUnits.set(Unit); in computeSubRegs()
447 AR->RegUnits.set(Unit); in computeSubRegs()
453 if (RegUnits.empty()) in computeSubRegs()
454 RegUnits.set(RegBank.newRegUnit(this)); in computeSubRegs()
458 NativeRegUnits = RegUnits; in computeSubRegs()
602 for (unsigned RegUnit : RegUnits) { in getWeight()
1153 const CodeGenRegBank &RegBank, std::vector<unsigned> &RegUnits) const { in buildRegUnitSet()
1162 std::back_inserter(RegUnits)); in buildRegUnitSet()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUInsertSingleUseVDST.cpp194 const auto RegUnits = TRI->regunits(Reg); in runOnMachineFunction() local
195 if (any_of(RegUnits, [&RegisterUseCount](const MCRegUnit Unit) { in runOnMachineFunction()
201 for (const MCRegUnit Unit : RegUnits) in runOnMachineFunction()
/freebsd/contrib/llvm-project/llvm/utils/TableGen/
H A DRegisterInfoEmitter.cpp193 const RegUnitSet &RegUnits = Bank.getRegSetAt(i); in runEnums() local
194 OS << " " << RegUnits.Name << " = " << i << ",\n"; in runEnums()
223 std::vector<unsigned> RegUnits; in EmitRegUnitPressure() local
224 RC.buildRegUnitSet(RegBank, RegUnits); in EmitRegUnitPressure()
225 OS << RegBank.getRegUnitSetWeight(RegUnits); in EmitRegUnitPressure()
273 const RegUnitSet &RegUnits = RegBank.getRegSetAt(i); in EmitRegUnitPressure() local
274 MaxRegUnitWeight = std::max(MaxRegUnitWeight, RegUnits.Weight); in EmitRegUnitPressure()
275 OS << " \"" << RegUnits.Name << "\",\n"; in EmitRegUnitPressure()
289 const RegUnitSet &RegUnits = RegBank.getRegSetAt(i); in EmitRegUnitPressure() local
290 OS << " " << RegUnits.Weight << ", \t// " << i << ": " << RegUnits.Name in EmitRegUnitPressure()
/freebsd/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCRegisterInfo.h124 uint32_t RegUnits; member
637 unsigned RU = MCRI->get(Reg).RegUnits; in MCRegUnitIterator()