| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | PeepholeOptimizer.cpp | 99 using RegSubRegPair = TargetInstrInfo::RegSubRegPair; typedef
186 using RewriteMapTy = SmallDenseMap<RegSubRegPair, ValueTrackerResult>;
202 bool findNextSource(RegSubRegPair RegSubReg, RewriteMapTy &RewriteMap);
258 RegSubRegPair Def, RewriteMapTy &RewriteMap);
262 DenseMap<RegSubRegPair, MachineInstr *> CopySrcMIs;
269 bool getCopySrc(MachineInstr &MI, RegSubRegPair &SrcPair) { in getCopySrc()
278 SrcPair = RegSubRegPair(SrcReg, SrcSubReg); in getCopySrc()
285 RegSubRegPair SrcPair; in deleteChangedCopy()
332 SmallVector<RegSubRegPair, 2> RegSrcs;
355 RegSrcs.push_back(RegSubRegPair(SrcReg, SrcSubReg)); in addSource()
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| H A D | TailDuplicator.cpp | 358 DenseMap<Register, RegSubRegPair> &LocalVRMap, in processPHI()
359 SmallVectorImpl<std::pair<Register, RegSubRegPair>> &Copies, in processPHI()
367 LocalVRMap.insert(std::make_pair(DefReg, RegSubRegPair(SrcReg, SrcSubReg))); in processPHI()
372 Copies.push_back(std::make_pair(NewDef, RegSubRegPair(SrcReg, SrcSubReg))); in processPHI()
392 DenseMap<Register, RegSubRegPair> &LocalVRMap, in duplicateInstruction()
415 LocalVRMap.insert(std::make_pair(Reg, RegSubRegPair(NewReg, 0))); in duplicateInstruction()
465 LocalVRMap.insert(std::make_pair(Reg, RegSubRegPair(NewReg, 0))); in duplicateInstruction()
900 DenseMap<Register, RegSubRegPair> LocalVRMap; in tailDuplicate()
901 SmallVector<std::pair<Register, RegSubRegPair>, 4> CopyInfos; in tailDuplicate()
960 DenseMap<Register, RegSubRegPair> LocalVRMap; in tailDuplicate()
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| H A D | TargetInstrInfo.cpp | 1705 RegSubRegPair &BaseReg, RegSubRegPairAndIdx &InsertedReg) const { in getInsertSubregInputs()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TailDuplicator.h | 98 using RegSubRegPair = TargetInstrInfo::RegSubRegPair;
104 DenseMap<Register, RegSubRegPair> &LocalVRMap,
105 SmallVectorImpl<std::pair<Register, RegSubRegPair>> &Copies,
109 DenseMap<Register, RegSubRegPair> &LocalVRMap,
125 SmallVectorImpl<std::pair<Register, RegSubRegPair>> &CopyInfos,
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| H A D | TargetInstrInfo.h | 503 struct RegSubRegPair { struct
507 RegSubRegPair(Register Reg = Register(), unsigned SubReg = 0) argument
510 bool operator==(const RegSubRegPair& P) const { argument
513 bool operator!=(const RegSubRegPair& P) const {
521 struct RegSubRegPairAndIdx : RegSubRegPair {
526 : RegSubRegPair(Reg, SubReg), SubIdx(SubIdx) {} in RegSubRegPair() function
587 RegSubRegPair &BaseReg,
1407 RegSubRegPair &BaseReg, in getInsertSubregLikeInputs()
2285 template <> struct DenseMapInfo<TargetInstrInfo::RegSubRegPair> {
2288 static inline TargetInstrInfo::RegSubRegPair getEmptyKey() {
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | GCNDPPCombine.cpp | 59 using RegSubRegPair = TargetInstrInfo::RegSubRegPair; typedef in __anon1318784c0111::GCNDPPCombine
64 RegSubRegPair CombOldVGPR,
69 RegSubRegPair CombOldVGPR, bool CombBCZ,
207 RegSubRegPair CombOldVGPR, in createDPPInst()
486 MachineInstr &OrigMI, MachineInstr &MovMI, RegSubRegPair CombOldVGPR, in createDPPInst()
616 CombOldVGPR = RegSubRegPair( in combineDPPMov()
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| H A D | SIShrinkInstructions.cpp | 60 TargetInstrInfo::RegSubRegPair getSubRegForIndex(Register Reg, unsigned Sub,
609 TargetInstrInfo::RegSubRegPair
619 return TargetInstrInfo::RegSubRegPair(Reg, Sub); in getSubRegForIndex()
736 TargetInstrInfo::RegSubRegPair X1, Y1; in matchSwap()
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| H A D | SIInstrInfo.h | 1450 inline bool isOfRegClass(const TargetInstrInfo::RegSubRegPair &P, in isOfRegClass()
1462 TargetInstrInfo::RegSubRegPair getRegSubRegPair(const MachineOperand &O) { in getRegSubRegPair()
1464 return TargetInstrInfo::RegSubRegPair(O.getReg(), O.getSubReg()); in getRegSubRegPair()
1468 TargetInstrInfo::RegSubRegPair getRegSequenceSubReg(MachineInstr &MI,
1474 MachineInstr *getVRegSubRegDef(const TargetInstrInfo::RegSubRegPair &P,
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| H A D | SIFoldOperands.cpp | 919 DenseMap<TargetInstrInfo::RegSubRegPair, Register> VGPRCopies; in foldOperand()
920 SmallSetVector<TargetInstrInfo::RegSubRegPair, 32> SeenAGPRs; in foldOperand()
923 TargetInstrInfo::RegSubRegPair CopyToVGPR; in foldOperand()
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| H A D | SIInstrInfo.cpp | 5746 SmallDenseSet<RegSubRegPair> SGPRsUsed; in isOperandLegal()
5748 SGPRsUsed.insert(RegSubRegPair(MO->getReg(), MO->getSubReg())); in isOperandLegal()
5755 RegSubRegPair SGPR(Op.getReg(), Op.getSubReg()); in isOperandLegal()
9291 TargetInstrInfo::RegSubRegPair getRegOrUndef(const MachineOperand &RegOpnd) { in getRegOrUndef()
9293 return RegOpnd.isUndef() ? TargetInstrInfo::RegSubRegPair() : in getRegOrUndef()
9297 TargetInstrInfo::RegSubRegPair
9305 return TargetInstrInfo::RegSubRegPair(); in getRegSequenceSubReg()
9311 TargetInstrInfo::RegSubRegPair &RSR) { in followSubRegDef()
9335 MachineInstr *llvm::getVRegSubRegDef(const TargetInstrInfo::RegSubRegPair &P, in getVRegSubRegDef()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.h | 96 RegSubRegPair &BaseReg,
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| H A D | ARMBaseInstrInfo.cpp | 5503 const MachineInstr &MI, unsigned DefIdx, RegSubRegPair &BaseReg, in getInsertSubregLikeInputs()
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