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Searched refs:RegSizeInfo (Results 1 – 4 of 4) sorted by relevance

/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/
H A DInfoByHwMode.cpp120 RegSizeInfo::RegSizeInfo(const Record *R) { in RegSizeInfo() function in RegSizeInfo
126 bool RegSizeInfo::operator<(const RegSizeInfo &I) const { in operator <()
131 bool RegSizeInfo::isSubClassOf(const RegSizeInfo &I) const { in isSubClassOf()
136 void RegSizeInfo::writeToStream(raw_ostream &OS) const { in writeToStream()
145 auto I = Map.try_emplace(P.first, RegSizeInfo(P.second)); in RegSizeInfoByHwMode()
169 const RegSizeInfo &A0 = get(M0); in hasStricterSpillThan()
170 const RegSizeInfo &B0 = I.get(M0); in hasStricterSpillThan()
222 raw_ostream &operator<<(raw_ostream &OS, const RegSizeInfo &T) { in operator <<()
H A DInfoByHwMode.h182 struct RegSizeInfo { struct
187 RegSizeInfo(const Record *R); argument
188 RegSizeInfo() = default;
189 bool operator<(const RegSizeInfo &I) const;
190 bool operator==(const RegSizeInfo &I) const {
194 bool operator!=(const RegSizeInfo &I) const { return !(*this == I); }
196 bool isSubClassOf(const RegSizeInfo &I) const;
200 struct RegSizeInfoByHwMode : public InfoByHwMode<RegSizeInfo> {
214 void insertRegSizeForMode(unsigned Mode, RegSizeInfo Info) { in insertRegSizeForMode()
219 raw_ostream &operator<<(raw_ostream &OS, const RegSizeInfo &T);
H A DCodeGenRegisters.cpp739 RegSizeInfo RI; in CodeGenRegisterClass()
/freebsd/contrib/llvm-project/llvm/utils/TableGen/
H A DRegisterInfoEmitter.cpp1324 const RegSizeInfo &RI = RC.RSI.get(M); in runTargetDesc()