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Searched refs:RegSizeInfo (Results 1 – 4 of 4) sorted by relevance

/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/
H A DInfoByHwMode.cpp118 RegSizeInfo::RegSizeInfo(Record *R) { in RegSizeInfo() function in RegSizeInfo
124 bool RegSizeInfo::operator<(const RegSizeInfo &I) const { in operator <()
129 bool RegSizeInfo::isSubClassOf(const RegSizeInfo &I) const { in isSubClassOf()
134 void RegSizeInfo::writeToStream(raw_ostream &OS) const { in writeToStream()
142 auto I = Map.insert({P.first, RegSizeInfo(P.second)}); in RegSizeInfoByHwMode()
166 const RegSizeInfo &A0 = get(M0); in hasStricterSpillThan()
167 const RegSizeInfo &B0 = I.get(M0); in hasStricterSpillThan()
218 raw_ostream &operator<<(raw_ostream &OS, const RegSizeInfo &T) { in operator <<()
H A DInfoByHwMode.h181 struct RegSizeInfo { struct
186 RegSizeInfo(Record *R); argument
187 RegSizeInfo() = default;
188 bool operator<(const RegSizeInfo &I) const;
189 bool operator==(const RegSizeInfo &I) const {
193 bool operator!=(const RegSizeInfo &I) const { return !(*this == I); }
195 bool isSubClassOf(const RegSizeInfo &I) const;
199 struct RegSizeInfoByHwMode : public InfoByHwMode<RegSizeInfo> {
213 void insertRegSizeForMode(unsigned Mode, RegSizeInfo Info) { in insertRegSizeForMode()
218 raw_ostream &operator<<(raw_ostream &OS, const RegSizeInfo &T);
H A DCodeGenRegisters.cpp815 RegSizeInfo RI; in CodeGenRegisterClass()
/freebsd/contrib/llvm-project/llvm/utils/TableGen/
H A DRegisterInfoEmitter.cpp1285 const RegSizeInfo &RI = RC.RSI.get(M); in runTargetDesc()