Searched refs:RegRec (Results 1 – 5 of 5) sorted by relevance
345 const Record *RegRec = RegInst->TheDef; in operator ()() local376 RegRI.HasEVEX_NF, RegRec->getValueAsBit("hasEVEX_RC"), in operator ()()377 RegRec->getValueAsBit("hasLockPrefix"), in operator ()()378 RegRec->getValueAsBit("hasNoTrackPrefix")) != in operator ()()396 unsigned RegOutSize = RegRec->getValueAsDag("OutOperandList")->getNumArgs(); in operator ()()398 unsigned RegInSize = RegRec->getValueAsDag("InOperandList")->getNumArgs(); in operator ()()449 const Record *RegRec = RegInst->TheDef; in addEntryWithFlags() local475 StringRef RegInstName = RegRec->getName(); in addEntryWithFlags()487 uint8_t Enc = byteFromBitsInit(RegRec->getValueAsBitsInit("OpEncBits")); in addEntryWithFlags()490 const BitsInit *VectSize = RegRec->getValueAsBitsInit("VectSize"); in addEntryWithFlags()[all …]
31 const Record *RegRec; // Physical register. member82 Entry.RegRec = DI->getDef(); in addOperandMapping()257 const Record *Reg = Expansion.OperandMap[MIOpNo + i].RegRec; in emitLoweringEmitter()
95 const Record *RegRec; member253 OperandMap[OpNo].RegRec = DI->getDef(); in addDagOperandMapping()774 const Record *Reg = SourceOperandMap[OpNo].RegRec; in emitCompressInstEmitter()877 const Record *Reg = DestOperandMap[OpNo].RegRec; in emitCompressInstEmitter()
59 unsigned X86Disassembler::getRegOperandSize(const Record *RegRec) { in getRegOperandSize() argument60 if (RegRec->isSubClassOf("RegisterClass")) in getRegOperandSize()61 return RegRec->getValueAsInt("Alignment"); in getRegOperandSize()62 if (RegRec->isSubClassOf("RegisterOperand")) in getRegOperandSize()63 return RegRec->getValueAsDef("RegClass")->getValueAsInt("Alignment"); in getRegOperandSize()
384 unsigned getRegOperandSize(const Record *RegRec);