| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ResourcePriorityQueue.cpp | 56 RegPressure.resize(NumRC); in ResourcePriorityQueue()
58 std::fill(RegPressure.begin(), RegPressure.end(), 0); in ResourcePriorityQueue()
364 if ((RegPressure[RC->getID()] + in regPressureDelta()
366 (RegPressure[RC->getID()] + in regPressureDelta()
479 RegPressure[RC->getID()] += numberRCValSuccInSU(SU, RC->getID()); in scheduledNode()
490 if (RegPressure[RC->getID()] > in scheduledNode()
492 RegPressure[RC->getID()] -= numberRCValPredInSU(SU, RC->getID()); in scheduledNode()
493 else RegPressure[RC->getID()] = 0; in scheduledNode()
|
| H A D | ScheduleDAGRRList.cpp | 1752 std::vector<unsigned> RegPressure; member in __anona90f206e0311::RegReductionPQBase
1771 RegPressure.resize(NumRC); in RegReductionPQBase()
1773 std::fill(RegPressure.begin(), RegPressure.end(), 0); in RegReductionPQBase()
1796 std::fill(RegPressure.begin(), RegPressure.end(), 0); in releaseState()
2085 unsigned RP = RegPressure[Id]; in dumpRegPressure()
2111 if ((RegPressure[RCId] + Cost) >= RegLimit[RCId]) in HighRegPressure()
2130 if (RegPressure[RCId] >= RegLimit[RCId]) in MayReduceRegPressure()
2161 if (RegPressure[RCId] >= RegLimit[RCId]) in RegPressureDiff()
2176 if (RegPressure[RCId] >= RegLimit[RCId]) in RegPressureDiff()
2222 RegPressure[RCId] += Cost; in scheduledNode()
[all …]
|
| H A D | SelectionDAGISel.cpp | 297 if (TLI->getSchedulingPreference() == Sched::RegPressure) in createDefaultScheduler()
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineLICM.cpp | 159 SmallVector<unsigned, 8> RegPressure; member in __anona9a475ae0111::MachineLICMBase
202 RegPressure.clear(); in releaseMemory()
367 RegPressure.resize(NumRPS); in INITIALIZE_PASS_DEPENDENCY()
368 std::fill(RegPressure.begin(), RegPressure.end(), 0); in INITIALIZE_PASS_DEPENDENCY()
768 BackTrace.push_back(RegPressure); in EnterScope()
906 std::fill(RegPressure.begin(), RegPressure.end(), 0); in InitRegPressure()
929 if (static_cast<int>(RegPressure[Class]) < -RPIdAndCost.second) in UpdateRegPressure()
930 RegPressure[Class] = 0; in UpdateRegPressure()
932 RegPressure[Class] += RPIdAndCost.second; in UpdateRegPressure()
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ResourcePriorityQueue.h | 52 std::vector<unsigned> RegPressure; variable
|
| H A D | MachineScheduler.h | 420 IntervalPressure RegPressure; variable
440 RegClassInfo(C->RegClassInfo), RPTracker(RegPressure), in ScheduleDAGMILive()
460 const IntervalPressure &getRegPressure() const { return RegPressure; } in getRegPressure()
|
| H A D | TargetLowering.h | 103 RegPressure, // Scheduling for lowest register pressure. enumerator
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/ |
| H A D | XtensaISelLowering.cpp | 52 setSchedulingPreference(Sched::RegPressure); in XtensaTargetLowering()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 48 setSchedulingPreference(Sched::RegPressure); in AVRTargetLowering()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 56 setSchedulingPreference(Sched::RegPressure); in WebAssemblyTargetLowering()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 1619 setSchedulingPreference(Sched::RegPressure); in ARMTargetLowering()
1974 return Sched::RegPressure; in getSchedulingPreference()
1985 return Sched::RegPressure; in getSchedulingPreference()
1993 return Sched::RegPressure; in getSchedulingPreference()
1998 return Sched::RegPressure; in getSchedulingPreference()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 429 setSchedulingPreference(Sched::RegPressure); in NVPTXTargetLowering()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 577 setSchedulingPreference(Sched::RegPressure); in AMDGPUTargetLowering()
|
| H A D | SIISelLowering.cpp | 958 setSchedulingPreference(Sched::RegPressure); in SITargetLowering()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 133 setSchedulingPreference(Sched::RegPressure); in SystemZTargetLowering()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 152 setSchedulingPreference(Sched::RegPressure); in X86TargetLowering()
|