| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVMoveMerger.cpp | 33 bool isCandidateToMergeMVA01S(const DestSourcePair &RegPair);
34 bool isCandidateToMergeMVSA01(const DestSourcePair &RegPair);
45 const DestSourcePair &RegPair);
60 bool RISCVMoveMerge::isCandidateToMergeMVA01S(const DestSourcePair &RegPair) {
61 Register Destination = RegPair.Destination->getReg();
62 Register Source = RegPair.Source->getReg(); in isCandidateToMergeMVA01S() argument
71 bool RISCVMoveMerge::isCandidateToMergeMVSA01(const DestSourcePair &RegPair) {
72 Register Destination = RegPair.Destination->getReg();
73 Register Source = RegPair.Source->getReg(); in isCandidateToMergeMVSA01() argument
125 const DestSourcePair &RegPair) { in findMatchingInst()
127 findMatchingInst(MachineBasicBlock::iterator & MBBI,unsigned InstOpcode,const DestSourcePair & RegPair) findMatchingInst() argument
188 auto RegPair = TII->isCopyInstrImpl(*MBBI); mergeMoveSARegPair() local
[all...] |
| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/AsmParser/ |
| H A D | HexagonAsmParser.cpp | 1355 auto GetRegPair = [this, r](RegPairVals RegPair) { in processInstruction() argument
1356 const std::string R1 = r + utostr(RegPair.first); in processInstruction()
1357 const std::string R2 = r + utostr(RegPair.second); in processInstruction()
1361 auto GetScalarRegs = [RI, GetRegPair](unsigned RegPair) { in processInstruction() argument
1362 const unsigned Lower = RI->getEncodingValue(RegPair); in processInstruction()
1368 const RegPairVals RegPair = in processInstruction() local
1371 return GetRegPair(RegPair); in processInstruction()
1464 const std::pair<unsigned, unsigned> RegPair = GetScalarRegs(MO.getReg()); in processInstruction() local
1465 MO.setReg(RegPair.first); in processInstruction()
1466 Inst.addOperand(MCOperand::createReg(RegPair.second)); in processInstruction()
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVDuplicatesTracker.cpp | 22 for (auto &RegPair : TPair.second) { in prebuildReg2Entry() local
23 const MachineFunction *MF = RegPair.first; in prebuildReg2Entry()
24 Register R = RegPair.second; in prebuildReg2Entry()
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | PeepholeOptimizer.cpp | 833 for (const RegSubRegPair &RegPair : SrcRegs) { in insertPHI() local
834 MIB.addReg(RegPair.Reg, 0, RegPair.SubReg); in insertPHI()
839 MRI.clearKillFlags(RegPair.Reg); in insertPHI()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/Disassembler/ |
| H A D | MipsDisassembler.cpp | 481 static DecodeStatus DecodeMovePRegPair(MCInst &Inst, unsigned RegPair,
2356 unsigned RegPair = fieldFromInstruction(Insn, 7, 3); in DecodeMovePOperands() local
2357 if (DecodeMovePRegPair(Inst, RegPair, Address, Decoder) == in DecodeMovePOperands()
2379 static DecodeStatus DecodeMovePRegPair(MCInst &Inst, unsigned RegPair, in DecodeMovePRegPair() argument
2382 switch (RegPair) { in DecodeMovePRegPair()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsMCCodeEmitter.cpp | 197 unsigned RegPair = getMovePRegPairOpValue(MI, 0, Fixups, STI); in encodeInstruction()
198 Binary = (Binary & 0xFFFFFC7F) | (RegPair << 7); in encodeInstruction()
215 unsigned RegPair = getMovePRegPairOpValue(MI, 0, Fixups, STI); encodeInstruction() local
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLoweringCall.cpp | 2487 for (auto const &RegPair : RegsToPass) in LowerCall() local
2488 for (MCPhysReg SubReg : TRI->subregs_inclusive(RegPair.first)) in LowerCall()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 4091 SDNode *RegPair = in Select() local
4093 SDValue Ops[] = {SDValue(RegPair, 0), Base, RegOffset, ImmOffset, Chain}; in Select()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 2305 bool RegPair = ((R0 == Mips::A1 && R1 == Mips::A2) || in processInstruction() local
2313 if (!RegPair) in processInstruction()
|