Searched refs:RegOpc (Results 1 – 3 of 3) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/AsmParser/ |
| H A D | WebAssemblyAsmTypeCheck.cpp | 409 auto RegOpc = WebAssembly::getRegisterOpcode(Opc); in typeCheck() local
410 assert(RegOpc != -1 && "Failed to get register version of MC instruction"); in typeCheck()
411 const auto &II = MII.get(RegOpc); in typeCheck()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrCompiler.td | 695 // RegOpc corresponds to the mr version of the instruction
699 multiclass LOCK_ArithBinOp<bits<8> RegOpc, bits<8> ImmOpc, bits<8> ImmOpc8,
704 def NAME#8mr : I<{RegOpc{7}, RegOpc{6}, RegOpc{5}, RegOpc{4},
705 RegOpc{3}, RegOpc{2}, RegOpc{1}, 0 },
711 def NAME#16mr : I<{RegOpc{7}, RegOpc{6}, RegOpc{5}, RegOpc{4},
712 RegOpc{3}, RegOpc{2}, RegOpc{1}, 1 },
719 def NAME#32mr : I<{RegOpc{7}, RegOpc{6}, RegOpc{5}, RegOpc{4},
720 RegOpc{3}, RegOpc{2}, RegOpc{1}, 1 },
727 def NAME#64mr : RI<{RegOpc{7}, RegOpc{6}, RegOpc{5}, RegOpc{4},
728 RegOpc{3}, RegOpc{2}, RegOpc{1}, 1 },
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonConstExtenders.cpp | 1616 unsigned RegOpc = getDirectRegReplacement(ExtOpc); in replaceInstrExact() local
1618 if (RegOpc == TargetOpcode::REG_SEQUENCE) { in replaceInstrExact()
1620 BuildMI(MBB, At, dl, HII->get(RegOpc)) in replaceInstrExact()
1627 BuildMI(MBB, At, dl, HII->get(RegOpc)) in replaceInstrExact()
1649 if (RegOpc != 0) { in replaceInstrExact()
1650 MachineInstrBuilder MIB = BuildMI(MBB, At, dl, HII->get(RegOpc)); in replaceInstrExact()
1672 unsigned RegOpc, Shift; in replaceInstrExact() local
1675 RegOpc = HII->changeAddrMode_io_rr(ExtOpc); in replaceInstrExact()
1680 RegOpc = HII->changeAddrMode_ur_rr(ExtOpc); in replaceInstrExact()
1686 if (RegOpc == -1u) { in replaceInstrExact()
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